make NaN behavior consistent with hardfloat

[riscv-isa-sim.git] / riscv / insns / fadd_s.h

diff --git a/riscv/insns/fadd_s.h b/riscv/insns/fadd_s.h
index 2fd5429c481d54f95087ba41460354ad66015c27..952d1a73d55dcb29b861c399a5d598bd40151005 100644 (file)
--- a/riscv/insns/fadd_s.h
+++ b/riscv/insns/fadd_s.h
@@ -1,4 +1,4 @@
 require_fp;
 softfloat_roundingMode = RM;
-FRD = f32_add(FRS1, FRS2);
+FRD = f32_mulAdd(FRS1, 0x3f800000, FRS2);
 set_fp_exceptions;