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make NaN behavior consistent with hardfloat
[riscv-isa-sim.git]
/
riscv
/
insns
/
fmul_s.h
diff --git
a/riscv/insns/fmul_s.h
b/riscv/insns/fmul_s.h
index 64755785991ec37d191962fc65975c854397a8ee..a954c3d1438f691fcae83246089906f2f3519681 100644
(file)
--- a/
riscv/insns/fmul_s.h
+++ b/
riscv/insns/fmul_s.h
@@
-1,4
+1,4
@@
require_fp;
softfloat_roundingMode = RM;
-FRD = f32_mul
(FRS1, FRS2
);
+FRD = f32_mul
Add(FRS1, FRS2, (FRS1 ^ FRS2) & (uint32_t)INT32_MIN
);
set_fp_exceptions;