Add debug_module bus device.

[riscv-isa-sim.git] / riscv / processor.h

diff --git a/riscv/processor.h b/riscv/processor.h
index 1eabee4fabdbb5c511b233eeb8bb14c0933a6cd0..3511d303e351ab99c987abbe24400bc0bb481a76 100644 (file)
--- a/riscv/processor.h
+++ b/riscv/processor.h
@@ -35,7 +35,6 @@ typedef struct
 {
   uint8_t prv;
   bool step;
-  bool debugint;
   bool ebreakm;
   bool ebreakh;
   bool ebreaks;
@@ -97,7 +96,6 @@ public:
   processor_t(const char* isa, sim_t* sim, uint32_t id);
   ~processor_t();
 
-  void set_debug_int();
   void set_debug(bool value);
   void set_histogram(bool value);
   void reset(bool value);