Add debug_module bus device.

[riscv-isa-sim.git] / riscv / sim.cc

diff --git a/riscv/sim.cc b/riscv/sim.cc
index 7c50425e5a9baf6ac90398738f9e66d67129fe94..b09e7208433675f832919ce31030114a257dca5b 100644 (file)
--- a/riscv/sim.cc
+++ b/riscv/sim.cc
@@ -3,6 +3,7 @@
 #include "sim.h"
 #include "mmu.h"
 #include "htif.h"
+#include "gdbserver.h"
 #include <map>
 #include <iostream>
 #include <sstream>
@@ -41,13 +42,6 @@ sim_t::sim_t(const char* isa, size_t nprocs, size_t mem_mb, bool halted,
     fprintf(stderr, "warning: only got %lu bytes of target mem (wanted %lu)\n",
             (unsigned long)memsz, (unsigned long)memsz0);
 
-  /* Copy Debug ROM into the end of the allocated block, because we surely
-   * didn't succeed in allocating 0xfffffffff800 bytes. */
-  /* TODO: Once everything uses the new memory map, just put this at the
-   * address that it actually belongs at. */
-  memcpy(mem + memsz - DEBUG_SIZE + DEBUG_ROM_START - DEBUG_START,
-          debug_rom_raw, debug_rom_raw_len);
-
   debug_mmu = new mmu_t(this, NULL);
 
   for (size_t i = 0; i < procs.size(); i++) {
@@ -58,6 +52,8 @@ sim_t::sim_t(const char* isa, size_t nprocs, size_t mem_mb, bool halted,
 
   rtc.reset(new rtc_t(procs));
   make_config_string();
+
+  bus.add_device(DEBUG_START, &debug_module);
 }
 
 sim_t::~sim_t()
@@ -153,6 +149,11 @@ bool sim_t::mmio_store(reg_t addr, size_t len, const uint8_t* bytes)
   return bus.store(addr, len, bytes);
 }
 
+char* sim_t::mmio_page(reg_t addr)
+{
+  return bus.page(addr);
+}
+
 void sim_t::make_config_string()
 {
   reg_t rtc_addr = EXT_IO_BASE;