make NaN behavior consistent with hardfloat

[riscv-isa-sim.git] / softfloat / f64_to_i64.c

diff --git a/softfloat/f64_to_i64.c b/softfloat/f64_to_i64.c
index 89663eebf4f3babb545907c437f5e3ca29ea9ca2..676e944dd6ceb48ada3d224be07ea9281db25976 100755 (executable)
--- a/softfloat/f64_to_i64.c
+++ b/softfloat/f64_to_i64.c
@@ -29,7 +29,7 @@ int_fast64_t f64_to_i64( float64_t a, int_fast8_t roundingMode, bool exact )
             return\r
                 ! sign\r
                     || ( ( exp == 0x7FF )\r
-                             && ( sig != UINT64_C( 0x0010000000000000 ) ) )\r
+                             && fracF64UI( uiA ) )\r
                     ? INT64_C( 0x7FFFFFFFFFFFFFFF )\r
                     : - INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1;\r
         }\r