replace i_ready with ready_i and o_valid with valid_o

[ieee754fpu.git] / src / add / test_prioritymux_pipe.py

diff --git a/src/add/test_prioritymux_pipe.py b/src/add/test_prioritymux_pipe.py
index 5884884104b2c1f7e675727de1faa58c36a856ac..366986af455aebf0322a8770e456e4a3ebc055b6 100644 (file)
--- a/src/add/test_prioritymux_pipe.py
+++ b/src/add/test_prioritymux_pipe.py
@@ -164,13 +164,13 @@ class InputTest:
             #stall_range = randint(0, 3)
             #for j in range(randint(1,10)):
             #    stall = randint(0, stall_range) != 0
-            #    yield self.dut.n[0].i_ready.eq(stall)
+            #    yield self.dut.n[0].ready_i.eq(stall)
             #    yield
             n = self.dut.n
-            yield n.i_ready.eq(1)
+            yield n.ready_i.eq(1)
             yield
-            o_n_valid = yield n.o_valid
-            i_n_ready = yield n.i_ready
+            o_n_valid = yield n.valid_o
+            i_n_ready = yield n.ready_i
             if not o_n_valid or not i_n_ready:
                 continue