style: eliminate equality tests with true and false
[gem5.git] / src / cpu / o3 / fetch_impl.hh
2014-06-01 Steve Reinhardtstyle: eliminate equality tests with true and false stable_2014_08_26
2014-01-24 Dam Sunwoomem: per-thread cache occupancy and per-block ages
2014-01-24 Matt Horsnellbase: add support for probe points and common probes
2014-01-24 Matt Horsnellmem: track per-request latencies and access depths...
2013-11-15 Anthony Gutierrezcpu: allow the fetch buffer to be smaller than a cache...
2013-10-17 Matt Horsnellcpu: add consistent guarding to *_impl.hh files.
2013-08-19 Andreas Hanssoncpu: Fix a bug in the O3 CPU introduced by the cache...
2013-07-18 Andreas Hanssonmem: Set the cache line size on a system level
2013-04-22 Ali Saidicpu: fix a switching issue with the o3 cpu. stable_2013_06_16
2013-03-05 Ali Saidicpu: fix a switching issue with the o3 cpu.
2013-02-15 Matt Horsnello3: fix tick used for renaming and issue with range...
2013-01-24 Nilay Vaish ext... branch predictor: move out of o3 and inorder cpus
2013-01-07 Andreas Sandbergcpu: Rewrite O3 draining to avoid stopping in microcode
2013-01-07 Andreas Sandbergcpu: Initialize the O3 pipeline from startup()
2013-01-05 Gabe BlackDecoder: Remove the thread context get/set from the...
2012-08-28 Andreas HanssonClock: Add a Cycles wrapper class and use where applicable
2012-08-28 Andreas HanssonClock: Rework clocks to avoid tick-to-cycle transformations
2012-08-22 Andreas HanssonPacket: Remove NACKs from packet and its use in endpoints
2012-08-15 Anthony GutierrezO3,ARM: fix some problems with drain/switchout function...
2012-06-05 Ali SaidiISA: Back-out NoopMachInst as a StaticInstPtr change.
2012-06-04 Gabe BlackISA: Turn the ExtMachInst NoopMachinst into the StaticI...
2012-05-26 Gabe BlackCPU: Merge the predecoder and decoder.
2012-05-01 Andreas HanssonMEM: Separate requests and responses for timing accesses
2012-04-14 Andreas HanssonMEM: Remove the Broadcast destination from the packet
2012-04-06 Andreas HanssonMEM: Enable multiple distributed generalized memories
2012-03-11 Brian GraysonO3: Add fatal when fetchWidth > Impl::MaxWidth.
2012-03-09 Geoffrey BlakeCheckerCPU: Make CheckerCPU runtime selectable instead...
2012-02-24 Andreas HanssonCPU: Round-two unifying instr/data CPU ports across...
2012-02-12 Ali Saidimem: Add a master ID to each request object.
2012-02-10 Nilay VaishO3 CPU: Improve handling of delayed commit flag
2012-02-10 Nilay VaishO3 CPU: Strengthen condition for handling interrupts
2012-02-10 Nilay VaishO3 CPU: Provide the squashing instruction
2012-02-10 Nilay VaishO3 Fetch: Check if PC is pointing to Microcode ROM
2012-02-01 Gabe BlackMerge ... head, hopefully the last time for this batch.
2012-01-31 Geoffrey BlakeCheckerCPU: Re-factor CheckerCPU to be compatible with...
2012-01-31 Gabe BlackMerge with main repository.
2012-01-29 Gabe BlackYet another merge with the main repository.
2012-01-28 Gabe BlackMerge with the main repo.
2012-01-16 Gabe BlackMerge yet again with the main repository.
2012-01-17 Andreas HanssonCPU: Moving towards a more general port across CPU...
2012-01-07 Gabe BlackAnother merge with the main repository.
2012-01-07 Gabe BlackMerge with the main repository again.
2012-01-07 Gabe BlackMerge with main repository.
2011-12-13 Nathan Binkertgcc: fix unused variable warnings from GCC 4.6.1
2011-11-18 Gabe BlackSE/FS: Get rid of FULL_SYSTEM in the CPU directory.
2011-09-09 Gabe BlackDecode: Pull instruction decoding out of the StaticInst...
2011-08-15 Gabe BlackO3: When squashing, restore the macroop that should...
2011-08-14 Gabe BlackO3: Add a pointer to the macroop for a microop in the...
2011-08-13 Gabe BlackO3: At the end of an instruction, force fetchAddr to...
2011-08-09 Gabe BlackO3: Stop using the current macroop no matter why you...
2011-07-31 Gabe BlackO3: Fix corner case squashing into the microcode ROM.
2011-07-15 Giacomo GabrielliO3: Create a pipeline activity viewer for the O3 CPU...
2011-07-10 Geoffrey BlakeO3: Fix up pipelining icache accesses in fetch stage...
2011-07-10 Ali SaidiO3: Make sure fetch doesn't go off into the weeds durin...
2011-06-11 Korey Sewello3: missing newlines on some dprintfs
2011-05-23 Geoffrey BlakeO3: Fix issue with interrupts/faults occuring in the...
2011-04-15 Nathan Binkerttrace: reimplement the DTRACE function so it doesn...
2011-04-15 Nathan Binkertincludes: sort all includes
2011-04-04 Ali SaidiARM: Cleanup implementation of ITSTATE and put importan...
2011-03-18 Ali SaidiAutomated merge with ssh://hg@repo.m5sim.org/m5
2011-03-18 Ali SaidiO3: Send instruction back to fetch on squash to seed...
2011-03-18 Ali SaidiO3: Cleanup the commitInfo comm struct.
2011-03-18 Ali SaidiMem: Fix issue with dirty block being lost when entire...
2011-02-25 Timothy M. JonesO3CPU: Fix iqCount and lsqCount SMT fetch policies.
2011-02-23 Ali SaidiO3: Fix bug when a squash occurs right before TLB miss...
2011-02-22 Brad Beckmannm5: merged in hammer fix
2011-02-18 Korey Sewellm5: merge inorder/release-notes/make_release changes
2011-02-16 Nathan Binkertmerge alpha system files into tree
2011-02-14 Gabe BlackO3: Fetch from the microcode ROM when needed.
2011-02-12 Giacomo GabrielliO3: Fix pipeline restart when a table walk completes...
2011-02-03 Gabe BlackO3: Fix a style bug in O3.
2011-01-18 Matt HorsnellO3: Fix some variable length instruction issues with...
2011-01-18 Matt HorsnellO3: Fix mispredicts from non control instructions.
2011-01-18 Ali SaidiO3: Support timing translations for O3 CPU fetch.
2011-01-18 Min Kyu JeongO3: Fixes fetch deadlock when the interrupt clears...
2011-01-08 Steve ReinhardtReplace curTick global variable with accessor functions.
2010-11-16 Gabe BlackO3: Make O3 support variably lengthed instructions.
2010-10-31 Gabe BlackISA,CPU,etc: Create an ISA defined PC type that abstrac...
2010-08-23 Min Kyu JeongO3: Skipping mem-order violation check for uncachable...
2010-08-23 Min Kyu JeongARM: Improve printing of uop disassembly.
2010-01-19 Derek Howermerge
2009-09-26 Steve ReinhardtO3: Mark fetch stage as active if it faults.
2009-09-23 Nathan Binkertarch: nuke arch/isa_specific.hh and move stuff to gener...
2009-08-03 Derek HowerAutomated merge with ssh://hg@m5sim.org/m5
2009-08-02 Steve ReinhardtFix setting of INST_FETCH flag for O3 CPU.
2009-05-26 Nathan Binkerttypes: add a type for thread IDs and try to use it...
2009-05-17 Nathan Binkertincludes: sort includes again
2009-05-17 Nathan Binkerttypes: Move stuff for global types into src/base/types.hh
2009-04-18 Korey Sewello3-delay-slot-bpred: fix decode stage handling of uncdt...
2009-04-16 Steve Reinhardto3: handle fetch with no active threads correctly.
2009-04-09 Nathan Binkerttlb: More fixing of unified TLB
2009-04-09 Gabe Blacktlb: Don't separate the TLB classes into an instruction...
2009-04-06 Gabe BlackMerge ARM into the head. ARM will compile but may not...
2009-03-04 Steve ReinhardtO3: Make numThreads error message more helpful.
2009-02-25 Gabe BlackISA: Replace the translate functions in the TLBs with...
2009-02-25 Gabe BlackCPU: Get rid of translate... functions from various...
2008-11-03 Lisa HsuAdd in Context IDs to the simulator. From now on,...
2008-11-03 Lisa Hsumake BaseCPU the provider of _cpuId, and cpuId() instea...
2008-08-11 Nathan Binkertparams: Convert the CPU objects to use the auto generat...
2008-06-28 Steve ReinhardtAutomated merge after backout.
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