projects / sifive-blocks.git / history
? search:
summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next
UART: actually return the pins, not just the module. We should do this for the other...
[sifive-blocks.git] / src / main / scala / devices / uart /
2017-06-13 Megan WachsUART: actually return the pins, not just the module... tree | commitdiff
2017-06-13 Megan WachsGPIO/SPI/I2C: Add sync stages in place of dummy variabl... tree | commitdiff
2017-06-13 Megan WachsGPIO/SPI/I2C: Add sync stages in place of dummy variabl... tree | commitdiff
2017-06-12 Henry Cookperiphery: convert periphery bundle traits to work... tree | commitdiff
2017-05-14 Wesley W. Terpstrauart: power-on with the right divider for the design... tree | commitdiff
2017-03-10 Megan WachsMerge remote-tracking branch 'origin/master' into debug... tree | commitdiff
2017-03-03 Wesley W. TerpstraMerge pull request #4 from sifive/periphery-keys tree | commitdiff
2017-03-03 Wesley W. Terpstradevices: include DTS meta-data tree | commitdiff
2017-03-03 Wesley W. Terpstradevices: create periphery keys for all devices tree | commitdiff
2017-02-10 Alex SolomatnikovMerge remote-tracking branch 'origin/master' into i2c i2c tree | commitdiff
2017-02-01 Wesley W. Terpstrasifive-blocks: trust diplomacy to get names right tree | commitdiff
2016-12-07 Wesley W. TerpstraLazyModule: provide Parameters tree | commitdiff
2016-11-29 SiFiveInitial commit. tree | commitdiff
Unnamed repository; edit this file 'description' to name the repository.