git.libre-soc.org Git - ls2.git/history - src/simsoc_hyperram

2022-04-04	Luke Kenneth Casso...	allow setting individual directions on QSPI dq0-dq3	blob \| commitdiff \| raw
2022-04-04	Luke Kenneth Casso...	sigh put firmware.hex qspi file in correct place	blob \| commitdiff \| raw \| diff to current
2022-04-04	Raptor Engineering...	Fix SPI device simulation model MISO/MOSI wiring	blob \| commitdiff \| raw \| diff to current
2022-03-31	Luke Kenneth Casso...	got icarus verilog model of QSPI working and it returns...	blob \| commitdiff \| raw \| diff to current
2022-03-31	Luke Kenneth Casso...	whitespace cleanup	blob \| commitdiff \| raw \| diff to current
2022-03-26	Luke Kenneth Casso...	add clock output on hyperram sim	blob \| commitdiff \| raw \| diff to current
2022-03-26	Luke Kenneth Casso...	remove switches from hyperram iverilog test	blob \| commitdiff \| raw \| diff to current
2022-03-26	Luke Kenneth Casso...	remove unneeded model variable	blob \| commitdiff \| raw \| diff to current
2022-03-26	Luke Kenneth Casso...	add missing ECP5 model OBZ.v and rename testbench	blob \| commitdiff \| raw \| diff to current
2022-03-26	Luke Kenneth Casso...	add hyperram iverilog runner including s27kl0641.v...	blob \| commitdiff \| raw \| diff to current