soc-cocotb-sim.git
3 years agoFunction is a generator.
Staf Verhaegen [Tue, 6 Apr 2021 18:37:34 +0000 (20:37 +0200)]
Function is a generator.

3 years agoFix pre-layout simulation with 4K SRAM blocks.
Staf Verhaegen [Tue, 6 Apr 2021 18:33:58 +0000 (20:33 +0200)]
Fix pre-layout simulation with 4K SRAM blocks.

3 years agoAdd sim models for SRAM block.
Staf Verhaegen [Tue, 6 Apr 2021 18:32:12 +0000 (20:32 +0200)]
Add sim models for SRAM block.

Both Verilog and VHDL model is provided.

3 years agoadd wishbone sim gtk test script
Luke Kenneth Casson Leighton [Tue, 6 Apr 2021 16:09:34 +0000 (17:09 +0100)]
add wishbone sim gtk test script

3 years agoadd comments
Luke Kenneth Casson Leighton [Tue, 6 Apr 2021 15:07:42 +0000 (16:07 +0100)]
add comments

3 years agofix wishbone jtag test to run: results not correct yet
Luke Kenneth Casson Leighton [Tue, 6 Apr 2021 14:58:09 +0000 (15:58 +0100)]
fix wishbone jtag test to run: results not correct yet

3 years agoadd first cut at wishbone jtag unit test
Luke Kenneth Casson Leighton [Tue, 6 Apr 2021 14:38:31 +0000 (15:38 +0100)]
add first cut at wishbone jtag unit test

3 years agowhitespace
Luke Kenneth Casson Leighton [Tue, 6 Apr 2021 14:13:46 +0000 (15:13 +0100)]
whitespace

3 years ago80 char linewrap
Luke Kenneth Casson Leighton [Sun, 4 Apr 2021 18:09:18 +0000 (19:09 +0100)]
80 char linewrap

3 years agoTest different combinations of i, o, oe for InTriOut
Staf Verhaegen [Sun, 4 Apr 2021 16:06:42 +0000 (18:06 +0200)]
Test different combinations of i, o, oe for InTriOut

Now run_iverilog_ls180.py show the multiple drive conflict for
sram_dq_oe signal.

3 years agoSupport running tb on test_issuer subblock.
Staf Verhaegen [Sat, 3 Apr 2021 18:57:50 +0000 (20:57 +0200)]
Support running tb on test_issuer subblock.

Use wrapper class around dut that select proper signals depending on
top cell used. Should be able to be used later to extend to post_pnr
netlist.

3 years agoUpdate gitignore.
Staf Verhaegen [Sat, 3 Apr 2021 18:54:53 +0000 (20:54 +0200)]
Update gitignore.

3 years agoFull boundary scan.
Staf Verhaegen [Fri, 2 Apr 2021 18:27:08 +0000 (20:27 +0200)]
Full boundary scan.

Show that *pad__oe are x when they are set by boundary scan to 1.
Needs to be debugged.

3 years agoTypo.
Staf Verhaegen [Fri, 2 Apr 2021 17:28:57 +0000 (19:28 +0200)]
Typo.

3 years agoAdd helper class JTAGPin
Staf Verhaegen [Fri, 2 Apr 2021 17:11:04 +0000 (19:11 +0200)]
Add helper class JTAGPin

This will now group code for operation on pins.

3 years agoFirst version of boundary scan test bench.
Staf Verhaegen [Fri, 2 Apr 2021 16:16:23 +0000 (18:16 +0200)]
First version of boundary scan test bench.

Only for pre_pnr at the moment.

3 years agopre_pnr/test.py: Fix idcode SVF test name.
Staf Verhaegen [Fri, 2 Apr 2021 16:11:27 +0000 (18:11 +0200)]
pre_pnr/test.py: Fix idcode SVF test name.

3 years agopre_pnr/test.py: Reset JTAG before executing SVF.
Staf Verhaegen [Fri, 2 Apr 2021 16:10:24 +0000 (18:10 +0200)]
pre_pnr/test.py: Reset JTAG before executing SVF.

3 years agoTWI enabled in boundary scan
Luke Kenneth Casson Leighton [Thu, 1 Apr 2021 22:15:26 +0000 (23:15 +0100)]
TWI enabled in boundary scan

3 years agoshow how to get the boundary scan information from the JSON file
Luke Kenneth Casson Leighton [Thu, 1 Apr 2021 22:05:51 +0000 (23:05 +0100)]
show how to get the boundary scan information from the JSON file
generated by "make mkpinpux" in soc

3 years agoadd one more up to path
Luke Kenneth Casson Leighton [Thu, 1 Apr 2021 21:47:18 +0000 (22:47 +0100)]
add one more up to path

3 years agomove pre_pnr cocotb sim to soc-cocotb-sim directory
Luke Kenneth Casson Leighton [Thu, 1 Apr 2021 21:34:50 +0000 (22:34 +0100)]
move pre_pnr cocotb sim to soc-cocotb-sim directory

3 years agomove post-pnr to new subdirectory
Luke Kenneth Casson Leighton [Thu, 1 Apr 2021 21:29:35 +0000 (22:29 +0100)]
move post-pnr to new subdirectory

3 years agoupdate README
Luke Kenneth Casson Leighton [Thu, 1 Apr 2021 17:36:20 +0000 (18:36 +0100)]
update README

3 years agosort out Makefile for building
Luke Kenneth Casson Leighton [Thu, 1 Apr 2021 16:41:40 +0000 (17:41 +0100)]
sort out Makefile for building

3 years agoha! got IDCODE and reset test to work
Luke Kenneth Casson Leighton [Thu, 1 Apr 2021 16:35:04 +0000 (17:35 +0100)]
ha! got IDCODE and reset test to work

3 years agomatch ir_width with experiment10 and do not overwrite IDCODE
Luke Kenneth Casson Leighton [Thu, 1 Apr 2021 16:01:21 +0000 (17:01 +0100)]
match ir_width with experiment10 and do not overwrite IDCODE

3 years agoconnect up jtag corona pads
Luke Kenneth Casson Leighton [Thu, 1 Apr 2021 14:46:16 +0000 (15:46 +0100)]
connect up jtag corona pads

3 years agoadd cocotb testbench
Luke Kenneth Casson Leighton [Thu, 1 Apr 2021 14:42:17 +0000 (15:42 +0100)]
add cocotb testbench

3 years agoremove not-needed thing from cocotb Makefile
Luke Kenneth Casson Leighton [Thu, 1 Apr 2021 14:40:01 +0000 (15:40 +0100)]
remove not-needed thing from cocotb Makefile

3 years agoadd first cocotb Makefile
Luke Kenneth Casson Leighton [Thu, 1 Apr 2021 14:32:35 +0000 (15:32 +0100)]
add first cocotb Makefile

3 years agoadd "make corona" option
Luke Kenneth Casson Leighton [Thu, 1 Apr 2021 14:15:02 +0000 (15:15 +0100)]
add "make corona" option

3 years agocompile all libraries, use --std=08 it passes
Luke Kenneth Casson Leighton [Thu, 1 Apr 2021 14:03:32 +0000 (15:03 +0100)]
compile all libraries, use --std=08 it passes

3 years agoadd vst corrections program
Luke Kenneth Casson Leighton [Thu, 1 Apr 2021 13:40:06 +0000 (14:40 +0100)]
add vst corrections program

3 years agodo niolib conversion as well as nsxlib
Luke Kenneth Casson Leighton [Thu, 1 Apr 2021 11:19:14 +0000 (12:19 +0100)]
do niolib conversion as well as nsxlib

3 years agobuild vhd objects
Luke Kenneth Casson Leighton [Wed, 31 Mar 2021 17:36:38 +0000 (18:36 +0100)]
build vhd objects

3 years agoadd conversion from alliance vbe to vst using coriolis2 vasy
Luke Kenneth Casson Leighton [Wed, 31 Mar 2021 17:22:46 +0000 (18:22 +0100)]
add conversion from alliance vbe to vst using coriolis2 vasy

3 years agostart on Makefile, add notes, add alliance-check-toolkit submodule
Luke Kenneth Casson Leighton [Wed, 31 Mar 2021 17:07:53 +0000 (18:07 +0100)]
start on Makefile, add notes, add alliance-check-toolkit submodule

3 years agoadd vst to .gitignore so that generated files do not get added by mistake
Luke Kenneth Casson Leighton [Mon, 29 Mar 2021 12:36:09 +0000 (13:36 +0100)]
add vst to .gitignore so that generated files do not get added by mistake

3 years agoadd initial empty README.txt in ls180 directory
Luke Kenneth Casson Leighton [Mon, 29 Mar 2021 12:04:16 +0000 (13:04 +0100)]
add initial empty README.txt in ls180 directory