ieee754fpu.git
5 years agoFPNorm1Single out_z wrong arguments
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 14:12:48 +0000 (14:12 +0000)]
FPNorm1Single out_z wrong arguments

5 years agoadd FPNorm1Data class
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 14:12:31 +0000 (14:12 +0000)]
add FPNorm1Data class

5 years agoremove unneeded variable
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 13:41:19 +0000 (13:41 +0000)]
remove unneeded variable

5 years agouse ispec and ospec in FPNorm1ModSingle
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 13:39:56 +0000 (13:39 +0000)]
use ispec and ospec in FPNorm1ModSingle

5 years agoremove unneeded variable
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 13:35:29 +0000 (13:35 +0000)]
remove unneeded variable

5 years agouse ispec and ospec in FPNormaliseModSingle
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 13:33:47 +0000 (13:33 +0000)]
use ispec and ospec in FPNormaliseModSingle

5 years agomore use of ospec
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 13:29:36 +0000 (13:29 +0000)]
more use of ospec

5 years agouse ospec in FPAddAlignSingleAdd
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 13:28:17 +0000 (13:28 +0000)]
use ospec in FPAddAlignSingleAdd

5 years agoremove unneeded variable
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 13:22:49 +0000 (13:22 +0000)]
remove unneeded variable

5 years agouse ospec and ispec in FPAddStage1Mod
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 13:22:01 +0000 (13:22 +0000)]
use ospec and ispec in FPAddStage1Mod

5 years agouse mod.ospec in FPAddStage0
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 13:17:54 +0000 (13:17 +0000)]
use mod.ospec in FPAddStage0

5 years agoadd ospec to FPAddStage0Mod
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 13:16:18 +0000 (13:16 +0000)]
add ospec to FPAddStage0Mod

5 years agoadd ispec to AddStage0Mod
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 13:13:17 +0000 (13:13 +0000)]
add ispec to AddStage0Mod

5 years agoremove redundant in_z
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 13:10:03 +0000 (13:10 +0000)]
remove redundant in_z

5 years agouse ospec in AddAlignSingleMod class
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 13:08:58 +0000 (13:08 +0000)]
use ospec in AddAlignSingleMod class

5 years agouse ispec/ospec in FPAddAlignSingleMod
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 13:01:11 +0000 (13:01 +0000)]
use ispec/ospec in FPAddAlignSingleMod

5 years agouse ospec in FPAddSpecialCasesDeNorm module
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 12:56:40 +0000 (12:56 +0000)]
use ospec in FPAddSpecialCasesDeNorm module

5 years agoconvert FPAddDeNormMod to ospec/ispec
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 12:53:32 +0000 (12:53 +0000)]
convert FPAddDeNormMod to ospec/ispec

5 years agouse ospec to make clone of out_z
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 12:48:02 +0000 (12:48 +0000)]
use ospec to make clone of out_z

5 years agoadd ospec function to SpecialCases Mod
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 12:46:14 +0000 (12:46 +0000)]
add ospec function to SpecialCases Mod

5 years agocreate FPNumBase2Ops class and add ispec function to SpecialCasesMod
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 12:45:01 +0000 (12:45 +0000)]
create FPNumBase2Ops class and add ispec function to SpecialCasesMod

5 years agoupdate comments
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 12:37:52 +0000 (12:37 +0000)]
update comments

5 years agocreate example pipeline buffer "StageChain" example,
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 11:13:59 +0000 (11:13 +0000)]
create example pipeline buffer "StageChain" example,
fix bug where output from one stage was not being assigned as the input
to the next

5 years agoadd StageChain class which links an arbitrary number of combinatorial stages
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 10:56:38 +0000 (10:56 +0000)]
add StageChain class which links an arbitrary number of combinatorial stages
together into a single stage, presenting the exact same API

5 years agoadd a couple of example names to one of the pipeline stages
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 10:55:23 +0000 (10:55 +0000)]
add a couple of example names to one of the pipeline stages

5 years agoadd a class-based unit test, found bug in eq function as a result:
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 09:13:44 +0000 (09:13 +0000)]
add a class-based unit test, found bug in eq function as a result:
eq function from Example2OpClass was returning a list of assignment
statements, which was resulting in a list-of-lists being created.
flattening to a single 1D list was required

5 years agosplit out p.i_valid logic into separate function, use in combpipe as well
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 06:40:37 +0000 (06:40 +0000)]
split out p.i_valid logic into separate function, use in combpipe as well

5 years agomulti-bit control capability
Luke Kenneth Casson Leighton [Wed, 20 Mar 2019 06:35:53 +0000 (06:35 +0000)]
multi-bit control capability

5 years agoupdate comments
Luke Kenneth Casson Leighton [Tue, 19 Mar 2019 12:39:04 +0000 (12:39 +0000)]
update comments

5 years agoupdate comments
Luke Kenneth Casson Leighton [Tue, 19 Mar 2019 12:23:53 +0000 (12:23 +0000)]
update comments

5 years agoupdate comments
Luke Kenneth Casson Leighton [Tue, 19 Mar 2019 12:21:56 +0000 (12:21 +0000)]
update comments

5 years agorename copy function to eq function
Luke Kenneth Casson Leighton [Tue, 19 Mar 2019 07:28:41 +0000 (07:28 +0000)]
rename copy function to eq function

5 years agoadd Record pipeline example and support
Luke Kenneth Casson Leighton [Tue, 19 Mar 2019 06:51:43 +0000 (06:51 +0000)]
add Record pipeline example and support

5 years agoadd comment about ports needing flattening
Luke Kenneth Casson Leighton [Tue, 19 Mar 2019 05:57:16 +0000 (05:57 +0000)]
add comment about ports needing flattening

5 years agooutput less-than test to ilang
Luke Kenneth Casson Leighton [Tue, 19 Mar 2019 05:15:04 +0000 (05:15 +0000)]
output less-than test to ilang

5 years agoremove unneeded functions, make result and r_data local to elaborate()
Luke Kenneth Casson Leighton [Tue, 19 Mar 2019 05:05:48 +0000 (05:05 +0000)]
remove unneeded functions, make result and r_data local to elaborate()

5 years agoremove unneeded functions, make result and r_data local to elaborate()
Luke Kenneth Casson Leighton [Tue, 19 Mar 2019 05:04:50 +0000 (05:04 +0000)]
remove unneeded functions, make result and r_data local to elaborate()

5 years agor_data and result need not be class members, made local to elaborate
Luke Kenneth Casson Leighton [Tue, 19 Mar 2019 04:59:02 +0000 (04:59 +0000)]
r_data and result need not be class members, made local to elaborate

5 years agoadd comment to eq function
Luke Kenneth Casson Leighton [Tue, 19 Mar 2019 04:39:39 +0000 (04:39 +0000)]
add comment to eq function

5 years agosplit out common code for both pipeline designs
Luke Kenneth Casson Leighton [Tue, 19 Mar 2019 04:36:29 +0000 (04:36 +0000)]
split out common code for both pipeline designs

5 years agorename p.data to p.i_data and n.data to n.o_data
Luke Kenneth Casson Leighton [Tue, 19 Mar 2019 04:27:20 +0000 (04:27 +0000)]
rename p.data to p.i_data and n.data to n.o_data

names were lost during initial code-morph

5 years agomove connect_out function to NextControl
Luke Kenneth Casson Leighton [Tue, 19 Mar 2019 04:16:06 +0000 (04:16 +0000)]
move connect_out function to NextControl

5 years agomove connect_in function to PrevControl
Luke Kenneth Casson Leighton [Tue, 19 Mar 2019 04:15:33 +0000 (04:15 +0000)]
move connect_in function to PrevControl

5 years agocreate connect_to_next function in NextControl, use it in Stage
Luke Kenneth Casson Leighton [Tue, 19 Mar 2019 04:11:38 +0000 (04:11 +0000)]
create connect_to_next function in NextControl, use it in Stage

5 years agorename / reorder to have prev and next control classes
Luke Kenneth Casson Leighton [Tue, 19 Mar 2019 04:01:01 +0000 (04:01 +0000)]
rename / reorder to have prev and next control classes

input i_ and output o_ secondary prefixes are kept

5 years agoadd module setup function in pipe stage
Luke Kenneth Casson Leighton [Mon, 18 Mar 2019 19:32:10 +0000 (19:32 +0000)]
add module setup function in pipe stage

5 years agorename o_comb to result in comb block
Luke Kenneth Casson Leighton [Mon, 18 Mar 2019 17:35:21 +0000 (17:35 +0000)]
rename o_comb to result in comb block

5 years agodont need input combinatorial
Luke Kenneth Casson Leighton [Mon, 18 Mar 2019 17:21:48 +0000 (17:21 +0000)]
dont need input combinatorial

5 years agoadd combinatorial pipe example
Luke Kenneth Casson Leighton [Mon, 18 Mar 2019 17:16:43 +0000 (17:16 +0000)]
add combinatorial pipe example

5 years agoclarify comments
Luke Kenneth Casson Leighton [Mon, 18 Mar 2019 12:06:43 +0000 (12:06 +0000)]
clarify comments

5 years agocreate helper functions to connect input to output on pipeline stages
Luke Kenneth Casson Leighton [Mon, 18 Mar 2019 11:55:42 +0000 (11:55 +0000)]
create helper functions to connect input to output on pipeline stages

5 years agorefactor the buffered pipeline to a cleaner API with better separation
Luke Kenneth Casson Leighton [Mon, 18 Mar 2019 11:31:40 +0000 (11:31 +0000)]
refactor the buffered pipeline to a cleaner API with better separation

5 years agoRemoved unnecessary files
Aleksandar Kostovic [Fri, 15 Mar 2019 15:14:38 +0000 (16:14 +0100)]
Removed unnecessary files

5 years agoMerge branch 'master' of ssh://libre-riscv.org:922/ieee754fpu
Aleksandar Kostovic [Fri, 15 Mar 2019 15:12:34 +0000 (16:12 +0100)]
Merge branch 'master' of ssh://libre-riscv.org:922/ieee754fpu

5 years agoOnly Imported FPGetOp
Aleksandar Kostovic [Fri, 15 Mar 2019 15:12:13 +0000 (16:12 +0100)]
Only Imported FPGetOp

5 years agoincrease frequency of number of entries placed in the InputGroup
Luke Kenneth Casson Leighton [Fri, 15 Mar 2019 14:00:28 +0000 (14:00 +0000)]
increase frequency of number of entries placed in the InputGroup

5 years agomove ack to inside loop, seems to reduce time spent in InputGroup parallel test
Luke Kenneth Casson Leighton [Fri, 15 Mar 2019 13:58:31 +0000 (13:58 +0000)]
move ack to inside loop, seems to reduce time spent in InputGroup parallel test

5 years agoadd parallel InputGroup unit test
Luke Kenneth Casson Leighton [Fri, 15 Mar 2019 12:37:14 +0000 (12:37 +0000)]
add parallel InputGroup unit test

5 years agorename BufPipe example to ExampleBufPipe
Luke Kenneth Casson Leighton [Fri, 15 Mar 2019 10:59:44 +0000 (10:59 +0000)]
rename BufPipe example to ExampleBufPipe

5 years agoinstantiate 2 FPGetOp instances and use them. a little awkwardly.
Luke Kenneth Casson Leighton [Fri, 15 Mar 2019 09:59:07 +0000 (09:59 +0000)]
instantiate 2 FPGetOp instances and use them.  a little awkwardly.

5 years agoupdate comments
Luke Kenneth Casson Leighton [Fri, 15 Mar 2019 09:33:44 +0000 (09:33 +0000)]
update comments

5 years agoremove unnecessary code
Luke Kenneth Casson Leighton [Fri, 15 Mar 2019 09:22:58 +0000 (09:22 +0000)]
remove unnecessary code

5 years agoadd extra comment block explaining pipe stage example
Luke Kenneth Casson Leighton [Fri, 15 Mar 2019 08:47:21 +0000 (08:47 +0000)]
add extra comment block explaining pipe stage example

5 years agoinverted busy signal and named it "ready"
Luke Kenneth Casson Leighton [Fri, 15 Mar 2019 08:37:18 +0000 (08:37 +0000)]
inverted busy signal and named it "ready"

5 years agorename stb to "valid"
Luke Kenneth Casson Leighton [Fri, 15 Mar 2019 08:29:56 +0000 (08:29 +0000)]
rename stb to "valid"

5 years agocreate classes for STB/BUSY, split in from out
Luke Kenneth Casson Leighton [Fri, 15 Mar 2019 08:28:18 +0000 (08:28 +0000)]
create classes for STB/BUSY, split in from out

5 years agoadd use of FPState, not being used yet
Luke Kenneth Casson Leighton [Fri, 15 Mar 2019 00:31:30 +0000 (00:31 +0000)]
add use of FPState, not being used yet

5 years agosplit pipeline test into 2 functions, one send, one receive
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 13:32:06 +0000 (13:32 +0000)]
split pipeline test into 2 functions, one send, one receive

5 years agogot fpdiv up and running again
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 06:33:10 +0000 (06:33 +0000)]
got fpdiv up and running again

5 years agoforgot to add submodules
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 05:41:02 +0000 (05:41 +0000)]
forgot to add submodules

5 years agogot rounding working again for fmul
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 05:09:36 +0000 (05:09 +0000)]
got rounding working again for fmul

5 years agoremove extra arg from old roundz function
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 04:42:53 +0000 (04:42 +0000)]
remove extra arg from old roundz function

5 years agomake a bit of a mess of the unit tests, getting mul up and running again
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 04:33:01 +0000 (04:33 +0000)]
make a bit of a mess of the unit tests, getting mul up and running again
taking a copy (sigh) of the old version of check_case and get_case

5 years agoget roundz working again, needed for mul stage
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 04:17:28 +0000 (04:17 +0000)]
get roundz working again, needed for mul stage

5 years agoadd new FPNormaliseSingleMod, not tested
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 04:16:28 +0000 (04:16 +0000)]
add new FPNormaliseSingleMod, not tested

5 years agostart to get fpmul back up and running
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 03:18:06 +0000 (03:18 +0000)]
start to get fpmul back up and running

5 years agoreplace copy of FPState with import of FPState
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 03:04:33 +0000 (03:04 +0000)]
replace copy of FPState with import of FPState

5 years agoupdate comments
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 02:54:57 +0000 (02:54 +0000)]
update comments

5 years agoStarted to update fmul.py to new conventions
Aleksandar Kostovic [Wed, 13 Mar 2019 17:39:14 +0000 (18:39 +0100)]
Started to update fmul.py to new conventions

5 years agoincrease data set to throw at pipeline in tests
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 12:39:09 +0000 (12:39 +0000)]
increase data set to throw at pipeline in tests

5 years agoadd random-busy, random-send single and dual buffered pipeline tests
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 11:48:10 +0000 (11:48 +0000)]
add random-busy, random-send single and dual buffered pipeline tests

5 years agosplit out actual pipeline stage into separate class
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 11:01:22 +0000 (11:01 +0000)]
split out actual pipeline stage into separate class

5 years agoadd 2 stage buffered pipeline unit test, reduce to 16-bit to make vcd clearer
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 07:26:23 +0000 (07:26 +0000)]
add 2 stage buffered pipeline unit test, reduce to 16-bit to make vcd clearer

5 years agoonly process data if the input strobe is valid
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 04:26:24 +0000 (04:26 +0000)]
only process data if the input strobe is valid

5 years agoadd in some assertions to check pipe output
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 04:24:50 +0000 (04:24 +0000)]
add in some assertions to check pipe output

5 years agosplit out unit test in buf pipe example
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 03:49:48 +0000 (03:49 +0000)]
split out unit test in buf pipe example

5 years agocombine blocks to add list of statements, add comments
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 03:47:49 +0000 (03:47 +0000)]
combine blocks to add list of statements, add comments

5 years agoupdate comments
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 03:35:41 +0000 (03:35 +0000)]
update comments

5 years agostore inv-strobe in temp signal
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 03:11:05 +0000 (03:11 +0000)]
store inv-strobe in temp signal

5 years agoclean up code
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 03:10:44 +0000 (03:10 +0000)]
clean up code

5 years agostore processed input in intermediary
Luke Kenneth Casson Leighton [Tue, 12 Mar 2019 15:14:13 +0000 (15:14 +0000)]
store processed input in intermediary

5 years agoadd (but comment out) reset signal
Luke Kenneth Casson Leighton [Tue, 12 Mar 2019 13:22:20 +0000 (13:22 +0000)]
add (but comment out) reset signal

5 years agoadd example buffered pipe
Luke Kenneth Casson Leighton [Tue, 12 Mar 2019 13:14:17 +0000 (13:14 +0000)]
add example buffered pipe

5 years agoadd example buffered pipe
Luke Kenneth Casson Leighton [Tue, 12 Mar 2019 13:13:33 +0000 (13:13 +0000)]
add example buffered pipe

5 years agoget InputGroup running
Luke Kenneth Casson Leighton [Mon, 11 Mar 2019 19:09:39 +0000 (19:09 +0000)]
get InputGroup running

5 years agoadd inputgroup test
Luke Kenneth Casson Leighton [Mon, 11 Mar 2019 12:54:57 +0000 (12:54 +0000)]
add inputgroup test

5 years agoTrigger needs to be combinatorial (saves clock cycles)
Luke Kenneth Casson Leighton [Mon, 11 Mar 2019 12:54:32 +0000 (12:54 +0000)]
Trigger needs to be combinatorial (saves clock cycles)

5 years agoreturn mid as part of ports
Luke Kenneth Casson Leighton [Mon, 11 Mar 2019 12:32:48 +0000 (12:32 +0000)]
return mid as part of ports

5 years agowhoops, forgot to make input an Array, can use array indexing now
Luke Kenneth Casson Leighton [Mon, 11 Mar 2019 12:32:09 +0000 (12:32 +0000)]
whoops, forgot to make input an Array, can use array indexing now

5 years agocreate an FPOps output class to clean up the InputGroup
Luke Kenneth Casson Leighton [Mon, 11 Mar 2019 11:26:45 +0000 (11:26 +0000)]
create an FPOps output class to clean up the InputGroup