Properly connect reset and cs signals
authorRaptor Engineering Development Team <support@raptorengineering.com>
Thu, 7 Apr 2022 18:38:01 +0000 (13:38 -0500)
committerRaptor Engineering Development Team <support@raptorengineering.com>
Thu, 7 Apr 2022 18:38:01 +0000 (13:38 -0500)
commitca3e97fc25b68272fb19322f339c738a1b7bd73c
tree6074ba78ffe2faec08cccb31c5b172fec0718fa2
parent6b41f65aa7a42837d14d172c57b261b0e660291a
Properly connect reset and cs signals

Starting to get (corrupt) data out of the memory...
examples/headless-versa-85.py
examples/headless/main.c
gram/phy/dfi.py
gram/phy/ecp5ddrphy.py
libgram/src/dfii.c