gram.core.multiplexer: Cleaner code in _Steerer
authorJean THOMAS <git0@pub.jeanthomas.me>
Fri, 7 Aug 2020 16:17:35 +0000 (18:17 +0200)
committerJean THOMAS <git0@pub.jeanthomas.me>
Fri, 7 Aug 2020 16:17:35 +0000 (18:17 +0200)
gram/core/multiplexer.py

index 4efdd178d7c7246ea9e0d04619182cdd355bf09a..f984b3a7e354153238fc35a2b4b789a5c0bc5e06 100644 (file)
@@ -164,10 +164,10 @@ class _Steerer(Elaboratable):
             rankbits = log2_int(nranks)
             if hasattr(phase, "reset"):
                 m.d.comb += phase.reset.eq(0)
-            m.d.comb += phase.clk_en.eq(Repl(Signal(reset=1), nranks))
+            m.d.comb += phase.clk_en.eq(Repl(1, nranks))
             if hasattr(phase, "odt"):
                 # FIXME: add dynamic drive for multi-rank (will be needed for high frequencies)
-                m.d.comb += phase.odt.eq(Repl(Signal(reset=1), nranks))
+                m.d.comb += phase.odt.eq(Repl(1, nranks))
             if rankbits:
                 rank_decoder = Decoder(nranks)
                 m.submodules += rank_decoder
@@ -180,8 +180,7 @@ class _Steerer(Elaboratable):
                         m.d.sync += phase.cs.eq(rank_decoder.o)
                 else:
                     m.d.sync += phase.cs.eq(rank_decoder.o)
-                m.d.sync += phase.bank.eq(Array(cmd.ba[:-rankbits]
-                                                for cmd in commands)[sel])
+                m.d.sync += phase.bank.eq(Array(cmd.ba[:-rankbits] for cmd in commands)[sel])
             else:
                 m.d.sync += [
                     phase.cs.eq(1),