split out corrections to separate module
[ieee754fpu.git] / src / add / fpcommon / corrections.py
1 # IEEE Floating Point Adder (Single Precision)
2 # Copyright (C) Jonathan P Dawson 2013
3 # 2013-12-12
4
5 from nmigen import Module, Signal, Cat, Mux, Array, Const
6 from nmigen.lib.coding import PriorityEncoder
7 from nmigen.cli import main, verilog
8 from math import log
9
10 from fpbase import FPNumIn, FPNumOut, FPOp, Overflow, FPBase, FPNumBase
11 from fpbase import MultiShiftRMerge, Trigger
12 from singlepipe import (ControlBase, StageChain, UnbufferedPipeline,
13 PassThroughStage)
14 from multipipe import CombMuxOutPipe
15 from multipipe import PriorityCombMuxInPipe
16
17 from fpbase import FPState, FPID
18 from fpcommon.roundz import FPRoundData
19
20
21 class FPCorrectionsMod:
22
23 def __init__(self, width, id_wid):
24 self.width = width
25 self.id_wid = id_wid
26 self.i = self.ispec()
27 self.out_z = self.ospec()
28
29 def ispec(self):
30 return FPRoundData(self.width, self.id_wid)
31
32 def ospec(self):
33 return FPRoundData(self.width, self.id_wid)
34
35 def process(self, i):
36 return self.out_z
37
38 def setup(self, m, i):
39 """ links module to inputs and outputs
40 """
41 m.submodules.corrections = self
42 m.d.comb += self.i.eq(i)
43
44 def elaborate(self, platform):
45 m = Module()
46 m.submodules.corr_in_z = self.i.z
47 m.submodules.corr_out_z = self.out_z.z
48 m.d.comb += self.out_z.eq(self.i) # copies mid, z, out_do_z
49 with m.If(~self.i.out_do_z):
50 with m.If(self.i.z.is_denormalised):
51 m.d.comb += self.out_z.z.e.eq(self.i.z.N127)
52 return m
53
54
55 class FPCorrections(FPState):
56
57 def __init__(self, width, id_wid):
58 FPState.__init__(self, "corrections")
59 self.mod = FPCorrectionsMod(width)
60 self.out_z = self.ospec()
61
62 def ispec(self):
63 return self.mod.ispec()
64
65 def ospec(self):
66 return self.mod.ospec()
67
68 def setup(self, m, in_z):
69 """ links module to inputs and outputs
70 """
71 self.mod.setup(m, in_z)
72
73 m.d.sync += self.out_z.eq(self.mod.out_z)
74 m.d.sync += self.out_z.mid.eq(self.mod.o.mid)
75
76 def action(self, m):
77 m.next = "pack"
78
79