10 if (num >= res + bit):
12 res = (res >> 1) + bit
28 R
= (R
<<2)|
((D
>>(i
+i
))&3)
29 R
= R
-((Q
<<2)|
1) #/*-Q01*/
33 R
= (R
<<2)|
((D
>>(i
+i
))&3)
34 R
= R
+((Q
<<2)|
3) #/*+Q11*/
37 Q
= (Q
<<1)|
1 #/*new Q:*/
39 Q
= (Q
<<1)|
0 #/*new Q:*/
52 //This is the main code of integer sqrt function found here:http://verilogcodes.blogspot.com/2017/11/a-verilog-function-for-finding-square-root.html
59 //Verilog function to find square root of a 32 bit number.
60 //The output is 16 bit.
62 input [31:0] num; //declare input
63 //intermediate signals.
66 reg [17:0] left,right,r;
69 //initialize all the variables.
73 left = 0; //input to adder/sub
74 right = 0; //input to adder/sub
76 //run the calculations for 16 iterations.
77 for(i=0;i<16;i=i+1) begin
78 right = {q,r[17],1'b1};
79 left = {r[15:0],a[31:30]};
80 a = {a[29:0],2'b00}; //left shift by 2 bits.
81 if (r[17] == 1) //add if r is negative
83 else //subtract if r is positive
87 sqrt = q; //final assignment of output.
89 endfunction //end of Function
92 c version (from paper linked from URL)
94 unsigned squart(D, r) /*Non-Restoring sqrt*/
95 unsigned D; /*D:32-bit unsigned integer to be square rooted */
98 unsigned Q = 0; /*Q:16-bit unsigned integer (root)*/
99 int R = 0; /*R:17-bit integer (remainder)*/
101 for (i = 15;i>=0;i--) /*for each root bit*/
105 R = R<<2)|((D>>(i+i))&3);
106 R = R-((Q<<2)|1); /*-Q01*/
110 R = R<<2)|((D>>(i+i))&3);
111 R = R+((Q<<2)|3); /*+Q11*/
113 if (R>=0) Q = Q<<1)|1; /*new Q:*/
114 else Q = Q<<1)|0; /*new Q:*/
117 /*remainder adjusting*/
118 if (R<0) R = R+((Q<<1)|1);
119 *r = R; /*return remainder*/
120 return(Q); /*return root*/
125 short isqrt(short num) {
127 short bit = 1 << 14; // The second-to-top bit is set: 1 << 30 for 32 bits
129 // "bit" starts at the highest power of four <= the argument.
134 if (num >= res + bit) {
136 res = (res >> 1) + bit;