add printout of binary version
[ieee754fpu.git] / src / add / fsqrt.py
1 from sfpy import Float32
2
3
4 # XXX DO NOT USE, fails on num=65536. wark-wark...
5 def sqrtsimple(num):
6 res = 0
7 bit = 1
8
9 while (bit < num):
10 bit <<= 2
11
12 while (bit != 0):
13 if (num >= res + bit):
14 num -= res + bit
15 res = (res >> 1) + bit
16 else:
17 res >>= 1
18 bit >>= 2
19
20 return res
21
22
23 def sqrt(num):
24 D = num # D is input (from num)
25 Q = 0
26 R = 0
27 r = 0 # remainder
28 for i in range(15, -1, -1): # negative ranges are weird...
29
30 if (R>=0):
31
32 R = (R<<2)|((D>>(i+i))&3)
33 R = R-((Q<<2)|1) #/*-Q01*/
34
35 else:
36
37 R = (R<<2)|((D>>(i+i))&3)
38 R = R+((Q<<2)|3) #/*+Q11*/
39
40 if (R>=0):
41 Q = (Q<<1)|1 #/*new Q:*/
42 else:
43 Q = (Q<<1)|0 #/*new Q:*/
44
45
46 if (R<0):
47 R = R+((Q<<1)|1)
48 r = R
49 return Q
50
51
52 # grabbed these from unit_test_single (convenience, this is just experimenting)
53
54 def get_mantissa(x):
55 return 0x7fffff & x
56
57 def get_exponent(x):
58 return ((x & 0x7f800000) >> 23) - 127
59
60 def set_exponent(x, e):
61 return (x & ~0x7f800000) | ((e+127) << 23)
62
63 def get_sign(x):
64 return ((x & 0x80000000) >> 31)
65
66 # convert FP32 to s/e/m
67 def create_fp32(s, e, m):
68 """ receive sign, exponent, mantissa, return FP32 """
69 return set_exponent((s << 31) | get_mantissa(m))
70
71 # convert s/e/m to FP32
72 def decode_fp32(x):
73 """ receive FP32, return sign, exponent, mantissa """
74 return get_sign(x), get_exponent(x), get_mantissa(x)
75
76
77 # main function, takes mantissa and exponent as separate arguments
78 # returns a tuple, sqrt'd mantissa, sqrt'd exponent
79
80 def main(mantissa, exponent):
81 if exponent & 1 != 0:
82 # shift mantissa up, subtract 1 from exp to compensate
83 return sqrt(mantissa << 1), (exponent - 1) >> 1
84 # mantissa as-is, no compensating needed on exp
85 return sqrt(mantissa), (exponent >> 1)
86
87
88 if __name__ == '__main__':
89
90 # quick test up to 1000 of two sqrt functions
91 for Q in range(1, int(1e4)):
92 print(Q, sqrt(Q), sqrtsimple(Q), int(Q**0.5))
93 assert int(Q**0.5) == sqrtsimple(Q), "Q sqrtsimpl fail %d" % Q
94 assert int(Q**0.5) == sqrt(Q), "Q sqrt fail %d" % Q
95
96 # quick mantissa/exponent demo
97 for e in range(26):
98 for m in range(26):
99 ms, es = main(m, e)
100 print("m:%d e:%d sqrt: m:%d e:%d" % (m, e, ms, es))
101
102 x = Float32(1234.123456789)
103 xbits = x.bits
104
105 print (x, type(x))
106 print (xbits, type(xbits))
107 s, e, m = decode_fp32(xbits)
108 print(s, e, m, hex(m))
109
110 se, sm = main(e, m)
111 print("our sqrt", s, se, sm, hex(sm), bin(sm))
112
113 sq_test = x.sqrt()
114 sq_xbits = sq_test.bits
115 s, e, m = decode_fp32(sq_xbits)
116 print ("sf32 sqrt", s, e, m, hex(m), bin(m))
117 """
118
119 Notes:
120 https://pdfs.semanticscholar.org/5060/4e9aff0e37089c4ab9a376c3f35761ffe28b.pdf
121
122 //This is the main code of integer sqrt function found here:http://verilogcodes.blogspot.com/2017/11/a-verilog-function-for-finding-square-root.html
123 //
124
125 module testbench;
126
127 reg [15:0] sqr;
128
129 //Verilog function to find square root of a 32 bit number.
130 //The output is 16 bit.
131 function [15:0] sqrt;
132 input [31:0] num; //declare input
133 //intermediate signals.
134 reg [31:0] a;
135 reg [15:0] q;
136 reg [17:0] left,right,r;
137 integer i;
138 begin
139 //initialize all the variables.
140 a = num;
141 q = 0;
142 i = 0;
143 left = 0; //input to adder/sub
144 right = 0; //input to adder/sub
145 r = 0; //remainder
146 //run the calculations for 16 iterations.
147 for(i=0;i<16;i=i+1) begin
148 right = {q,r[17],1'b1};
149 left = {r[15:0],a[31:30]};
150 a = {a[29:0],2'b00}; //left shift by 2 bits.
151 if (r[17] == 1) //add if r is negative
152 r = left + right;
153 else //subtract if r is positive
154 r = left - right;
155 q = {q[14:0],!r[17]};
156 end
157 sqrt = q; //final assignment of output.
158 end
159 endfunction //end of Function
160
161
162 c version (from paper linked from URL)
163
164 unsigned squart(D, r) /*Non-Restoring sqrt*/
165 unsigned D; /*D:32-bit unsigned integer to be square rooted */
166 int *r;
167 {
168 unsigned Q = 0; /*Q:16-bit unsigned integer (root)*/
169 int R = 0; /*R:17-bit integer (remainder)*/
170 int i;
171 for (i = 15;i>=0;i--) /*for each root bit*/
172 {
173 if (R>=0)
174 { /*new remainder:*/
175 R = R<<2)|((D>>(i+i))&3);
176 R = R-((Q<<2)|1); /*-Q01*/
177 }
178 else
179 { /*new remainder:*/
180 R = R<<2)|((D>>(i+i))&3);
181 R = R+((Q<<2)|3); /*+Q11*/
182 }
183 if (R>=0) Q = Q<<1)|1; /*new Q:*/
184 else Q = Q<<1)|0; /*new Q:*/
185 }
186
187 /*remainder adjusting*/
188 if (R<0) R = R+((Q<<1)|1);
189 *r = R; /*return remainder*/
190 return(Q); /*return root*/
191 }
192
193 From wikipedia page:
194
195 short isqrt(short num) {
196 short res = 0;
197 short bit = 1 << 14; // The second-to-top bit is set: 1 << 30 for 32 bits
198
199 // "bit" starts at the highest power of four <= the argument.
200 while (bit > num)
201 bit >>= 2;
202
203 while (bit != 0) {
204 if (num >= res + bit) {
205 num -= res + bit;
206 res = (res >> 1) + bit;
207 }
208 else
209 res >>= 1;
210 bit >>= 2;
211 }
212 return res;
213 }
214
215 """