src/add/test_buf_pipe.py

   1 """ Unit tests for Buffered and Unbuffered pipelines
   2
   3     contains useful worked examples of how to use the Pipeline API,
   4     including:
   5
   6     * Combinatorial Stage "Chaining"
   7     * class-based data stages
   8     * nmigen module-based data stages
   9     * special nmigen module-based data stage, where the stage *is* the module
  10     * Record-based data stages
  11     * static-class data stages
  12     * multi-stage pipelines (and how to connect them)
  13     * how to *use* the pipelines (see Test5) - how to get data in and out
  14
  15 """
  16
  17 from nmigen import Module, Signal, Mux
  18 from nmigen.hdl.rec import Record
  19 from nmigen.compat.sim import run_simulation
  20 from nmigen.cli import verilog, rtlil
  21
  22 from example_buf_pipe import ExampleBufPipe, ExampleBufPipeAdd
  23 from example_buf_pipe import ExamplePipeline, UnbufferedPipeline
  24 from example_buf_pipe import ExampleStageCls
  25 from example_buf_pipe import PrevControl, NextControl, BufferedPipeline
  26 from example_buf_pipe import StageChain, ControlBase, StageCls
  27
  28 from random import randint
  29
  30
  31 def check_o_n_valid(dut, val):
  32     o_n_valid = yield dut.n.o_valid
  33     assert o_n_valid == val
  34
  35 def check_o_n_valid2(dut, val):
  36     o_n_valid = yield dut.n.o_valid
  37     assert o_n_valid == val
  38
  39
  40 def testbench(dut):
  41     #yield dut.i_p_rst.eq(1)
  42     yield dut.n.i_ready.eq(0)
  43     yield dut.p.o_ready.eq(0)
  44     yield
  45     yield
  46     #yield dut.i_p_rst.eq(0)
  47     yield dut.n.i_ready.eq(1)
  48     yield dut.p.i_data.eq(5)
  49     yield dut.p.i_valid.eq(1)
  50     yield
  51
  52     yield dut.p.i_data.eq(7)
  53     yield from check_o_n_valid(dut, 0) # effects of i_p_valid delayed
  54     yield
  55     yield from check_o_n_valid(dut, 1) # ok *now* i_p_valid effect is felt
  56
  57     yield dut.p.i_data.eq(2)
  58     yield
  59     yield dut.n.i_ready.eq(0) # begin going into "stall" (next stage says ready)
  60     yield dut.p.i_data.eq(9)
  61     yield
  62     yield dut.p.i_valid.eq(0)
  63     yield dut.p.i_data.eq(12)
  64     yield
  65     yield dut.p.i_data.eq(32)
  66     yield dut.n.i_ready.eq(1)
  67     yield
  68     yield from check_o_n_valid(dut, 1) # buffer still needs to output
  69     yield
  70     yield from check_o_n_valid(dut, 1) # buffer still needs to output
  71     yield
  72     yield from check_o_n_valid(dut, 0) # buffer outputted, *now* we're done.
  73     yield
  74
  75
  76 def testbench2(dut):
  77     #yield dut.p.i_rst.eq(1)
  78     yield dut.n.i_ready.eq(0)
  79     #yield dut.p.o_ready.eq(0)
  80     yield
  81     yield
  82     #yield dut.p.i_rst.eq(0)
  83     yield dut.n.i_ready.eq(1)
  84     yield dut.p.i_data.eq(5)
  85     yield dut.p.i_valid.eq(1)
  86     yield
  87
  88     yield dut.p.i_data.eq(7)
  89     yield from check_o_n_valid2(dut, 0) # effects of i_p_valid delayed 2 clocks
  90     yield
  91     yield from check_o_n_valid2(dut, 0) # effects of i_p_valid delayed 2 clocks
  92
  93     yield dut.p.i_data.eq(2)
  94     yield
  95     yield from check_o_n_valid2(dut, 1) # ok *now* i_p_valid effect is felt
  96     yield dut.n.i_ready.eq(0) # begin going into "stall" (next stage says ready)
  97     yield dut.p.i_data.eq(9)
  98     yield
  99     yield dut.p.i_valid.eq(0)
 100     yield dut.p.i_data.eq(12)
 101     yield
 102     yield dut.p.i_data.eq(32)
 103     yield dut.n.i_ready.eq(1)
 104     yield
 105     yield from check_o_n_valid2(dut, 1) # buffer still needs to output
 106     yield
 107     yield from check_o_n_valid2(dut, 1) # buffer still needs to output
 108     yield
 109     yield from check_o_n_valid2(dut, 1) # buffer still needs to output
 110     yield
 111     yield from check_o_n_valid2(dut, 0) # buffer outputted, *now* we're done.
 112     yield
 113     yield
 114     yield
 115
 116
 117 class Test3:
 118     def __init__(self, dut, resultfn):
 119         self.dut = dut
 120         self.resultfn = resultfn
 121         self.data = []
 122         for i in range(num_tests):
 123             #data.append(randint(0, 1<<16-1))
 124             self.data.append(i+1)
 125         self.i = 0
 126         self.o = 0
 127
 128     def send(self):
 129         while self.o != len(self.data):
 130             send_range = randint(0, 3)
 131             for j in range(randint(1,10)):
 132                 if send_range == 0:
 133                     send = True
 134                 else:
 135                     send = randint(0, send_range) != 0
 136                 o_p_ready = yield self.dut.p.o_ready
 137                 if not o_p_ready:
 138                     yield
 139                     continue
 140                 if send and self.i != len(self.data):
 141                     yield self.dut.p.i_valid.eq(1)
 142                     yield self.dut.p.i_data.eq(self.data[self.i])
 143                     self.i += 1
 144                 else:
 145                     yield self.dut.p.i_valid.eq(0)
 146                 yield
 147
 148     def rcv(self):
 149         while self.o != len(self.data):
 150             stall_range = randint(0, 3)
 151             for j in range(randint(1,10)):
 152                 stall = randint(0, stall_range) != 0
 153                 yield self.dut.n.i_ready.eq(stall)
 154                 yield
 155                 o_n_valid = yield self.dut.n.o_valid
 156                 i_n_ready = yield self.dut.n.i_ready
 157                 if not o_n_valid or not i_n_ready:
 158                     continue
 159                 o_data = yield self.dut.n.o_data
 160                 self.resultfn(o_data, self.data[self.o], self.i, self.o)
 161                 self.o += 1
 162                 if self.o == len(self.data):
 163                     break
 164
 165 def test3_resultfn(o_data, expected, i, o):
 166     assert o_data == expected + 1, \
 167                 "%d-%d data %x not match %x\n" \
 168                 % (i, o, o_data, expected)
 169
 170 def data_placeholder():
 171         data = []
 172         for i in range(num_tests):
 173             d = PlaceHolder()
 174             d.src1 = randint(0, 1<<16-1)
 175             d.src2 = randint(0, 1<<16-1)
 176             data.append(d)
 177         return data
 178
 179 def data_dict():
 180         data = []
 181         for i in range(num_tests):
 182             data.append({'src1': randint(0, 1<<16-1),
 183                          'src2': randint(0, 1<<16-1)})
 184         return data
 185
 186
 187 class Test5:
 188     def __init__(self, dut, resultfn, data=None):
 189         self.dut = dut
 190         self.resultfn = resultfn
 191         if data:
 192             self.data = data
 193         else:
 194             self.data = []
 195             for i in range(num_tests):
 196                 self.data.append((randint(0, 1<<16-1), randint(0, 1<<16-1)))
 197         self.i = 0
 198         self.o = 0
 199
 200     def send(self):
 201         while self.o != len(self.data):
 202             send_range = randint(0, 3)
 203             for j in range(randint(1,10)):
 204                 if send_range == 0:
 205                     send = True
 206                 else:
 207                     send = randint(0, send_range) != 0
 208                 o_p_ready = yield self.dut.p.o_ready
 209                 if not o_p_ready:
 210                     yield
 211                     continue
 212                 if send and self.i != len(self.data):
 213                     yield self.dut.p.i_valid.eq(1)
 214                     for v in self.dut.set_input(self.data[self.i]):
 215                         yield v
 216                     self.i += 1
 217                 else:
 218                     yield self.dut.p.i_valid.eq(0)
 219                 yield
 220
 221     def rcv(self):
 222         while self.o != len(self.data):
 223             stall_range = randint(0, 3)
 224             for j in range(randint(1,10)):
 225                 stall = randint(0, stall_range) != 0
 226                 yield self.dut.n.i_ready.eq(stall)
 227                 yield
 228                 o_n_valid = yield self.dut.n.o_valid
 229                 i_n_ready = yield self.dut.n.i_ready
 230                 if not o_n_valid or not i_n_ready:
 231                     continue
 232                 if isinstance(self.dut.n.o_data, Record):
 233                     o_data = {}
 234                     dod = self.dut.n.o_data
 235                     for k, v in dod.fields.items():
 236                         o_data[k] = yield v
 237                 else:
 238                     o_data = yield self.dut.n.o_data
 239                 self.resultfn(o_data, self.data[self.o], self.i, self.o)
 240                 self.o += 1
 241                 if self.o == len(self.data):
 242                     break
 243
 244 def test5_resultfn(o_data, expected, i, o):
 245     res = expected[0] + expected[1]
 246     assert o_data == res, \
 247                 "%d-%d data %x not match %s\n" \
 248                 % (i, o, o_data, repr(expected))
 249
 250 def testbench4(dut):
 251     data = []
 252     for i in range(num_tests):
 253         #data.append(randint(0, 1<<16-1))
 254         data.append(i+1)
 255     i = 0
 256     o = 0
 257     while True:
 258         stall = randint(0, 3) != 0
 259         send = randint(0, 5) != 0
 260         yield dut.n.i_ready.eq(stall)
 261         o_p_ready = yield dut.p.o_ready
 262         if o_p_ready:
 263             if send and i != len(data):
 264                 yield dut.p.i_valid.eq(1)
 265                 yield dut.p.i_data.eq(data[i])
 266                 i += 1
 267             else:
 268                 yield dut.p.i_valid.eq(0)
 269         yield
 270         o_n_valid = yield dut.n.o_valid
 271         i_n_ready = yield dut.n.i_ready
 272         if o_n_valid and i_n_ready:
 273             o_data = yield dut.n.o_data
 274             assert o_data == data[o] + 2, "%d-%d data %x not match %x\n" \
 275                                         % (i, o, o_data, data[o])
 276             o += 1
 277             if o == len(data):
 278                 break
 279
 280 ######################################################################
 281 # Test 2 and 4
 282 ######################################################################
 283
 284 class ExampleBufPipe2(ControlBase):
 285     """ Example of how to do chained pipeline stages.
 286     """
 287
 288     def elaborate(self, platform):
 289         m = Module()
 290
 291         pipe1 = ExampleBufPipe()
 292         pipe2 = ExampleBufPipe()
 293
 294         m.submodules.pipe1 = pipe1
 295         m.submodules.pipe2 = pipe2
 296
 297         self.connect(m, [pipe1, pipe2])
 298
 299         return m
 300
 301
 302 class ExampleBufPipeChain2(BufferedPipeline):
 303     """ connects two stages together as a *single* combinatorial stage.
 304     """
 305     def __init__(self):
 306         stage1 = ExampleStageCls()
 307         stage2 = ExampleStageCls()
 308         combined = StageChain([stage1, stage2])
 309         BufferedPipeline.__init__(self, combined)
 310
 311
 312 def data_chain2():
 313         data = []
 314         for i in range(num_tests):
 315             data.append(randint(0, 1<<16-2))
 316         return data
 317
 318
 319 def test9_resultfn(o_data, expected, i, o):
 320     res = expected + 2
 321     assert o_data == res, \
 322                 "%d-%d data %x not match %s\n" \
 323                 % (i, o, o_data, repr(expected))
 324
 325
 326 ######################################################################
 327 # Test 6 and 10
 328 ######################################################################
 329
 330 class SetLessThan:
 331     def __init__(self, width, signed):
 332         self.src1 = Signal((width, signed))
 333         self.src2 = Signal((width, signed))
 334         self.output = Signal(width)
 335
 336     def elaborate(self, platform):
 337         m = Module()
 338         m.d.comb += self.output.eq(Mux(self.src1 < self.src2, 1, 0))
 339         return m
 340
 341
 342 class LTStage(StageCls):
 343     """ module-based stage example
 344     """
 345     def __init__(self):
 346         self.slt = SetLessThan(16, True)
 347
 348     def ispec(self):
 349         return (Signal(16), Signal(16))
 350
 351     def ospec(self):
 352         return Signal(16)
 353
 354     def setup(self, m, i):
 355         self.o = Signal(16)
 356         m.submodules.slt = self.slt
 357         m.d.comb += self.slt.src1.eq(i[0])
 358         m.d.comb += self.slt.src2.eq(i[1])
 359         m.d.comb += self.o.eq(self.slt.output)
 360
 361     def process(self, i):
 362         return self.o
 363
 364
 365 class LTStageDerived(SetLessThan, StageCls):
 366     """ special version of a nmigen module where the module is also a stage
 367
 368         shows that you don't actually need to combinatorially connect
 369         to the outputs, or add the module as a submodule: just return
 370         the module output parameter(s) from the Stage.process() function
 371     """
 372
 373     def __init__(self):
 374         SetLessThan.__init__(self, 16, True)
 375
 376     def ispec(self):
 377         return (Signal(16), Signal(16))
 378
 379     def ospec(self):
 380         return Signal(16)
 381
 382     def setup(self, m, i):
 383         m.submodules.slt = self
 384         m.d.comb += self.src1.eq(i[0])
 385         m.d.comb += self.src2.eq(i[1])
 386
 387     def process(self, i):
 388         return self.output
 389
 390
 391 class ExampleLTPipeline(UnbufferedPipeline):
 392     """ an example of how to use the unbuffered pipeline.
 393     """
 394
 395     def __init__(self):
 396         stage = LTStage()
 397         UnbufferedPipeline.__init__(self, stage)
 398
 399
 400 class ExampleLTBufferedPipeDerived(BufferedPipeline):
 401     """ an example of how to use the buffered pipeline.
 402     """
 403
 404     def __init__(self):
 405         stage = LTStageDerived()
 406         BufferedPipeline.__init__(self, stage)
 407
 408
 409 def test6_resultfn(o_data, expected, i, o):
 410     res = 1 if expected[0] < expected[1] else 0
 411     assert o_data == res, \
 412                 "%d-%d data %x not match %s\n" \
 413                 % (i, o, o_data, repr(expected))
 414
 415
 416 ######################################################################
 417 # Test 7
 418 ######################################################################
 419
 420 class ExampleAddRecordStage(StageCls):
 421     """ example use of a Record
 422     """
 423
 424     record_spec = [('src1', 16), ('src2', 16)]
 425     def ispec(self):
 426         """ returns a Record using the specification
 427         """
 428         return Record(self.record_spec)
 429
 430     def ospec(self):
 431         return Record(self.record_spec)
 432
 433     def process(self, i):
 434         """ process the input data, returning a dictionary with key names
 435             that exactly match the Record's attributes.
 436         """
 437         return {'src1': i.src1 + 1,
 438                 'src2': i.src2 + 1}
 439
 440 ######################################################################
 441 # Test 11
 442 ######################################################################
 443
 444 class ExampleAddRecordPlaceHolderStage(StageCls):
 445     """ example use of a Record, with a placeholder as the processing result
 446     """
 447
 448     record_spec = [('src1', 16), ('src2', 16)]
 449     def ispec(self):
 450         """ returns a Record using the specification
 451         """
 452         return Record(self.record_spec)
 453
 454     def ospec(self):
 455         return Record(self.record_spec)
 456
 457     def process(self, i):
 458         """ process the input data, returning a PlaceHolder class instance
 459             with attributes that exactly match those of the Record.
 460         """
 461         o = PlaceHolder()
 462         o.src1 = i.src1 + 1
 463         o.src2 = i.src2 + 1
 464         return o
 465
 466
 467 class PlaceHolder: pass
 468
 469
 470 class ExampleAddRecordPipe(UnbufferedPipeline):
 471     """ an example of how to use the combinatorial pipeline.
 472     """
 473
 474     def __init__(self):
 475         stage = ExampleAddRecordStage()
 476         UnbufferedPipeline.__init__(self, stage)
 477
 478
 479 def test7_resultfn(o_data, expected, i, o):
 480     res = (expected['src1'] + 1, expected['src2'] + 1)
 481     assert o_data['src1'] == res[0] and o_data['src2'] == res[1], \
 482                 "%d-%d data %s not match %s\n" \
 483                 % (i, o, repr(o_data), repr(expected))
 484
 485
 486 class ExampleAddRecordPlaceHolderPipe(UnbufferedPipeline):
 487     """ an example of how to use the combinatorial pipeline.
 488     """
 489
 490     def __init__(self):
 491         stage = ExampleAddRecordPlaceHolderStage()
 492         UnbufferedPipeline.__init__(self, stage)
 493
 494
 495 def test11_resultfn(o_data, expected, i, o):
 496     res1 = expected.src1 + 1
 497     res2 = expected.src2 + 1
 498     assert o_data['src1'] == res1 and o_data['src2'] == res2, \
 499                 "%d-%d data %s not match %s\n" \
 500                 % (i, o, repr(o_data), repr(expected))
 501
 502
 503 ######################################################################
 504 # Test 8
 505 ######################################################################
 506
 507
 508 class Example2OpClass:
 509     """ an example of a class used to store 2 operands.
 510         requires an eq function, to conform with the pipeline stage API
 511     """
 512
 513     def __init__(self):
 514         self.op1 = Signal(16)
 515         self.op2 = Signal(16)
 516
 517     def eq(self, i):
 518         return [self.op1.eq(i.op1), self.op2.eq(i.op2)]
 519
 520
 521 class ExampleAddClassStage(StageCls):
 522     """ an example of how to use the buffered pipeline, as a class instance
 523     """
 524
 525     def ispec(self):
 526         """ returns an instance of an Example2OpClass.
 527         """
 528         return Example2OpClass()
 529
 530     def ospec(self):
 531         """ returns an output signal which will happen to contain the sum
 532             of the two inputs
 533         """
 534         return Signal(16)
 535
 536     def process(self, i):
 537         """ process the input data (sums the values in the tuple) and returns it
 538         """
 539         return i.op1 + i.op2
 540
 541
 542 class ExampleBufPipeAddClass(BufferedPipeline):
 543     """ an example of how to use the buffered pipeline, using a class instance
 544     """
 545
 546     def __init__(self):
 547         addstage = ExampleAddClassStage()
 548         BufferedPipeline.__init__(self, addstage)
 549
 550
 551 class TestInputAdd:
 552     """ the eq function, called by set_input, needs an incoming object
 553         that conforms to the Example2OpClass.eq function requirements
 554         easiest way to do that is to create a class that has the exact
 555         same member layout (self.op1, self.op2) as Example2OpClass
 556     """
 557     def __init__(self, op1, op2):
 558         self.op1 = op1
 559         self.op2 = op2
 560
 561
 562 def test8_resultfn(o_data, expected, i, o):
 563     res = expected.op1 + expected.op2 # these are a TestInputAdd instance
 564     assert o_data == res, \
 565                 "%d-%d data %x not match %s\n" \
 566                 % (i, o, o_data, repr(expected))
 567
 568 def data_2op():
 569         data = []
 570         for i in range(num_tests):
 571             data.append(TestInputAdd(randint(0, 1<<16-1), randint(0, 1<<16-1)))
 572         return data
 573
 574
 575 num_tests = 100
 576
 577 if __name__ == '__main__':
 578     print ("test 1")
 579     dut = ExampleBufPipe()
 580     run_simulation(dut, testbench(dut), vcd_name="test_bufpipe.vcd")
 581
 582     print ("test 2")
 583     dut = ExampleBufPipe2()
 584     run_simulation(dut, testbench2(dut), vcd_name="test_bufpipe2.vcd")
 585     ports = [dut.p.i_valid, dut.n.i_ready,
 586              dut.n.o_valid, dut.p.o_ready] + \
 587              [dut.p.i_data] + [dut.n.o_data]
 588     vl = rtlil.convert(dut, ports=ports)
 589     with open("test_bufpipe2.il", "w") as f:
 590         f.write(vl)
 591
 592
 593     print ("test 3")
 594     dut = ExampleBufPipe()
 595     test = Test3(dut, test3_resultfn)
 596     run_simulation(dut, [test.send, test.rcv], vcd_name="test_bufpipe3.vcd")
 597
 598     print ("test 3.5")
 599     dut = ExamplePipeline()
 600     test = Test3(dut, test3_resultfn)
 601     run_simulation(dut, [test.send, test.rcv], vcd_name="test_combpipe3.vcd")
 602
 603     print ("test 4")
 604     dut = ExampleBufPipe2()
 605     run_simulation(dut, testbench4(dut), vcd_name="test_bufpipe4.vcd")
 606
 607     print ("test 5")
 608     dut = ExampleBufPipeAdd()
 609     test = Test5(dut, test5_resultfn)
 610     run_simulation(dut, [test.send, test.rcv], vcd_name="test_bufpipe5.vcd")
 611
 612     print ("test 6")
 613     dut = ExampleLTPipeline()
 614     test = Test5(dut, test6_resultfn)
 615     run_simulation(dut, [test.send, test.rcv], vcd_name="test_ltcomb6.vcd")
 616
 617     ports = [dut.p.i_valid, dut.n.i_ready,
 618              dut.n.o_valid, dut.p.o_ready] + \
 619              list(dut.p.i_data) + [dut.n.o_data]
 620     vl = rtlil.convert(dut, ports=ports)
 621     with open("test_ltcomb_pipe.il", "w") as f:
 622         f.write(vl)
 623
 624     print ("test 7")
 625     dut = ExampleAddRecordPipe()
 626     data=data_dict()
 627     test = Test5(dut, test7_resultfn, data=data)
 628     run_simulation(dut, [test.send, test.rcv], vcd_name="test_addrecord.vcd")
 629
 630     ports = [dut.p.i_valid, dut.n.i_ready,
 631              dut.n.o_valid, dut.p.o_ready,
 632              dut.p.i_data.src1, dut.p.i_data.src2,
 633              dut.n.o_data.src1, dut.n.o_data.src2]
 634     vl = rtlil.convert(dut, ports=ports)
 635     with open("test_recordcomb_pipe.il", "w") as f:
 636         f.write(vl)
 637
 638     print ("test 8")
 639     dut = ExampleBufPipeAddClass()
 640     data=data_2op()
 641     test = Test5(dut, test8_resultfn, data=data)
 642     run_simulation(dut, [test.send, test.rcv], vcd_name="test_bufpipe8.vcd")
 643
 644     print ("test 9")
 645     dut = ExampleBufPipeChain2()
 646     ports = [dut.p.i_valid, dut.n.i_ready,
 647              dut.n.o_valid, dut.p.o_ready] + \
 648              [dut.p.i_data] + [dut.n.o_data]
 649     vl = rtlil.convert(dut, ports=ports)
 650     with open("test_bufpipechain2.il", "w") as f:
 651         f.write(vl)
 652
 653     data = data_chain2()
 654     test = Test5(dut, test9_resultfn, data=data)
 655     run_simulation(dut, [test.send, test.rcv],
 656                         vcd_name="test_bufpipechain2.vcd")
 657
 658     print ("test 10")
 659     dut = ExampleLTBufferedPipeDerived()
 660     test = Test5(dut, test6_resultfn)
 661     run_simulation(dut, [test.send, test.rcv], vcd_name="test_ltbufpipe10.vcd")
 662     vl = rtlil.convert(dut, ports=ports)
 663     with open("test_ltbufpipe10.il", "w") as f:
 664         f.write(vl)
 665
 666     print ("test 11")
 667     dut = ExampleAddRecordPlaceHolderPipe()
 668     data=data_placeholder()
 669     test = Test5(dut, test11_resultfn, data=data)
 670     run_simulation(dut, [test.send, test.rcv], vcd_name="test_addrecord.vcd")
 671
 672