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[ieee754fpu.git] / src / ieee754 / add / test_fpnum.py
1 # FIXME: This file is on the pytest ignore list in pyproject.toml because it has borked imports
2 from random import randint
3 from nmigen import Module, Signal
4 from nmigen.compat.sim import run_simulation
5
6 from ieee754.fpcommon.fpbase import FPNum
7
8 class FPNumModShiftMulti:
9 def __init__(self, width):
10 self.a = FPNum(width)
11 self.ediff = Signal((self.a.e_width, True))
12
13 def elaborate(self, platform=None):
14
15 m = Module()
16 #m.d.sync += self.a.decode(self.a.v)
17 m.d.sync += self.a.shift_down_multi(self.ediff)
18
19 return m
20
21 def check_case(dut, width, e_width, m, e, i):
22 yield dut.a.m.eq(m)
23 yield dut.a.e.eq(e)
24 yield dut.ediff.eq(i)
25 yield
26 yield
27
28 out_m = yield dut.a.m
29 out_e = yield dut.a.e
30 ed = yield dut.ediff
31 calc_e = (e + i)
32 print (e, bin(m), out_e, calc_e, bin(out_m), i, ed)
33
34 calc_m = ((m >> (i+1)) << 1) | (m & 1)
35 for l in range(i):
36 if m & (1<<(l+1)):
37 calc_m |= 1
38
39 assert out_e == calc_e, "Output e 0x%x != expected 0x%x" % (out_e, calc_e)
40 assert out_m == calc_m, "Output m 0x%x != expected 0x%x" % (out_m, calc_m)
41
42 def testbench(dut):
43 m_width = dut.a.m_width
44 e_width = dut.a.e_width
45 e_max = dut.a.e_max
46 for j in range(200):
47 m = randint(0, (1<<m_width)-1)
48 zeros = randint(0, 31)
49 for i in range(zeros):
50 m &= ~(1<<i)
51 e = randint(-e_max, e_max)
52 for i in range(32):
53 yield from check_case(dut, m_width, e_width, m, e, i)
54
55 if __name__ == '__main__':
56 dut = FPNumModShiftMulti(width=32)
57 run_simulation(dut, testbench(dut), vcd_name="test_multishift.vcd")
58
59 #dut = MultiShiftModL(width=32)
60 #run_simulation(dut, testbench(dut), vcd_name="test_multishift.vcd")
61