src/ieee754/fpadd/fadd_state.py

   1 # IEEE Floating Point Adder (Single Precision)
   2 # Copyright (C) Jonathan P Dawson 2013
   3 # 2013-12-12
   4
   5 from nmigen import Module, Signal, Cat
   6 from nmigen.cli import main, verilog
   7
   8 from ieee754.fpcommon.fpbase import (FPNumIn, FPNumOut, FPOpIn,
   9                                      FPOpOut, Overflow, FPBase)
  10
  11 from nmutil.nmoperator import eq
  12
  13
  14 class FPADD(FPBase):
  15
  16     def __init__(self, width, single_cycle=False):
  17         FPBase.__init__(self)
  18         self.width = width
  19         self.single_cycle = single_cycle
  20
  21         self.in_a  = FPOpIn(width)
  22         self.in_a.data_i = Signal(width)
  23         self.in_b  = FPOpIn(width)
  24         self.in_b.data_i = Signal(width)
  25         self.out_z = FPOpOut(width)
  26         self.out_z.data_o = Signal(width)
  27
  28     def elaborate(self, platform=None):
  29         """ creates the HDL code-fragment for FPAdd
  30         """
  31         m = Module()
  32
  33         # Latches
  34         a = FPNumIn(self.in_a, self.width)
  35         b = FPNumIn(self.in_b, self.width)
  36         z = FPNumOut(self.width, False)
  37
  38         m.submodules.fpnum_a = a
  39         m.submodules.fpnum_b = b
  40         m.submodules.fpnum_z = z
  41         m.submodules.fpnum_in_a = self.in_a
  42         m.submodules.fpnum_in_b = self.in_b
  43         m.submodules.fpnum_out_z = self.out_z
  44
  45         m.d.comb += a.v.eq(self.in_a.v)
  46         m.d.comb += b.v.eq(self.in_b.v)
  47
  48         w = z.m_width + 4
  49         tot = Signal(w, reset_less=True) # sticky/round/guard, {mantissa} result, 1 overflow
  50
  51         of = Overflow()
  52
  53         m.submodules.overflow = of
  54
  55         with m.FSM() as fsm:
  56
  57             # ******
  58             # gets operand a
  59
  60             with m.State("get_a"):
  61                 res = self.get_op(m, self.in_a, a, "get_b")
  62                 m.d.sync += eq([a, self.in_a.ready_o], res)
  63
  64             # ******
  65             # gets operand b
  66
  67             with m.State("get_b"):
  68                 res = self.get_op(m, self.in_b, b, "special_cases")
  69                 m.d.sync += eq([b, self.in_b.ready_o], res)
  70
  71             # ******
  72             # special cases: NaNs, infs, zeros, denormalised
  73             # NOTE: some of these are unique to add.  see "Special Operations"
  74             # https://steve.hollasch.net/cgindex/coding/ieeefloat.html
  75
  76             with m.State("special_cases"):
  77
  78                 s_nomatch = Signal()
  79                 m.d.comb += s_nomatch.eq(a.s != b.s)
  80
  81                 m_match = Signal()
  82                 m.d.comb += m_match.eq(a.m == b.m)
  83
  84                 # if a is NaN or b is NaN return NaN
  85                 with m.If(a.is_nan | b.is_nan):
  86                     m.next = "put_z"
  87                     m.d.sync += z.nan(1)
  88
  89                 # XXX WEIRDNESS for FP16 non-canonical NaN handling
  90                 # under review
  91
  92                 ## if a is zero and b is NaN return -b
  93                 #with m.If(a.is_zero & (a.s==0) & b.is_nan):
  94                 #    m.next = "put_z"
  95                 #    m.d.sync += z.create(b.s, b.e, Cat(b.m[3:-2], ~b.m[0]))
  96
  97                 ## if b is zero and a is NaN return -a
  98                 #with m.Elif(b.is_zero & (b.s==0) & a.is_nan):
  99                 #    m.next = "put_z"
 100                 #    m.d.sync += z.create(a.s, a.e, Cat(a.m[3:-2], ~a.m[0]))
 101
 102                 ## if a is -zero and b is NaN return -b
 103                 #with m.Elif(a.is_zero & (a.s==1) & b.is_nan):
 104                 #    m.next = "put_z"
 105                 #    m.d.sync += z.create(a.s & b.s, b.e, Cat(b.m[3:-2], 1))
 106
 107                 ## if b is -zero and a is NaN return -a
 108                 #with m.Elif(b.is_zero & (b.s==1) & a.is_nan):
 109                 #    m.next = "put_z"
 110                 #    m.d.sync += z.create(a.s & b.s, a.e, Cat(a.m[3:-2], 1))
 111
 112                 # if a is inf return inf (or NaN)
 113                 with m.Elif(a.is_inf):
 114                     m.next = "put_z"
 115                     m.d.sync += z.inf(a.s)
 116                     # if a is inf and signs don't match return NaN
 117                     with m.If(b.exp_128 & s_nomatch):
 118                         m.d.sync += z.nan(1)
 119
 120                 # if b is inf return inf
 121                 with m.Elif(b.is_inf):
 122                     m.next = "put_z"
 123                     m.d.sync += z.inf(b.s)
 124
 125                 # if a is zero and b zero return signed-a/b
 126                 with m.Elif(a.is_zero & b.is_zero):
 127                     m.next = "put_z"
 128                     m.d.sync += z.create(a.s & b.s, b.e, b.m[3:-1])
 129
 130                 # if a is zero return b
 131                 with m.Elif(a.is_zero):
 132                     m.next = "put_z"
 133                     m.d.sync += z.create(b.s, b.e, b.m[3:-1])
 134
 135                 # if b is zero return a
 136                 with m.Elif(b.is_zero):
 137                     m.next = "put_z"
 138                     m.d.sync += z.create(a.s, a.e, a.m[3:-1])
 139
 140                 # if a equal to -b return zero (+ve zero)
 141                 with m.Elif(s_nomatch & m_match & (a.e == b.e)):
 142                     m.next = "put_z"
 143                     m.d.sync += z.zero(0)
 144
 145                 # Denormalised Number checks
 146                 with m.Else():
 147                     m.next = "align"
 148                     self.denormalise(m, a)
 149                     self.denormalise(m, b)
 150
 151             # ******
 152             # align.
 153
 154             with m.State("align"):
 155                 if not self.single_cycle:
 156                     # NOTE: this does *not* do single-cycle multi-shifting,
 157                     #       it *STAYS* in the align state until exponents match
 158
 159                     # exponent of a greater than b: shift b down
 160                     with m.If(a.e > b.e):
 161                         m.d.sync += b.shift_down(b)
 162                     # exponent of b greater than a: shift a down
 163                     with m.Elif(a.e < b.e):
 164                         m.d.sync += a.shift_down(a)
 165                     # exponents equal: move to next stage.
 166                     with m.Else():
 167                         m.next = "add_0"
 168                 else:
 169                     # This one however (single-cycle) will do the shift
 170                     # in one go.
 171
 172                     # XXX TODO: the shifter used here is quite expensive
 173                     # having only one would be better
 174
 175                     ediff = Signal((len(a.e), True), reset_less=True)
 176                     ediffr = Signal((len(a.e), True), reset_less=True)
 177                     m.d.comb += ediff.eq(a.e - b.e)
 178                     m.d.comb += ediffr.eq(b.e - a.e)
 179                     with m.If(ediff > 0):
 180                         m.d.sync += b.shift_down_multi(ediff)
 181                     # exponent of b greater than a: shift a down
 182                     with m.Elif(ediff < 0):
 183                         m.d.sync += a.shift_down_multi(ediffr)
 184
 185                     m.next = "add_0"
 186
 187             # ******
 188             # First stage of add.  covers same-sign (add) and subtract
 189             # special-casing when mantissas are greater or equal, to
 190             # give greatest accuracy.
 191
 192             with m.State("add_0"):
 193                 m.next = "add_1"
 194                 m.d.sync += z.e.eq(a.e)
 195                 # same-sign (both negative or both positive) add mantissas
 196                 with m.If(a.s == b.s):
 197                     m.d.sync += [
 198                         tot.eq(Cat(a.m, 0) + Cat(b.m, 0)),
 199                         z.s.eq(a.s)
 200                     ]
 201                 # a mantissa greater than b, use a
 202                 with m.Elif(a.m >= b.m):
 203                     m.d.sync += [
 204                         tot.eq(Cat(a.m, 0) - Cat(b.m, 0)),
 205                         z.s.eq(a.s)
 206                     ]
 207                 # b mantissa greater than a, use b
 208                 with m.Else():
 209                     m.d.sync += [
 210                         tot.eq(Cat(b.m, 0) - Cat(a.m, 0)),
 211                         z.s.eq(b.s)
 212                 ]
 213
 214             # ******
 215             # Second stage of add: preparation for normalisation.
 216             # detects when tot sum is too big (tot[27] is kinda a carry bit)
 217
 218             with m.State("add_1"):
 219                 m.next = "normalise_1"
 220                 # tot[27] gets set when the sum overflows. shift result down
 221                 with m.If(tot[-1]):
 222                     m.d.sync += [
 223                         z.m.eq(tot[4:]),
 224                         of.m0.eq(tot[4]),
 225                         of.guard.eq(tot[3]),
 226                         of.round_bit.eq(tot[2]),
 227                         of.sticky.eq(tot[1] | tot[0]),
 228                         z.e.eq(z.e + 1)
 229                 ]
 230                 # tot[27] zero case
 231                 with m.Else():
 232                     m.d.sync += [
 233                         z.m.eq(tot[3:]),
 234                         of.m0.eq(tot[3]),
 235                         of.guard.eq(tot[2]),
 236                         of.round_bit.eq(tot[1]),
 237                         of.sticky.eq(tot[0])
 238                 ]
 239
 240             # ******
 241             # First stage of normalisation.
 242
 243             with m.State("normalise_1"):
 244                 self.normalise_1(m, z, of, "normalise_2")
 245
 246             # ******
 247             # Second stage of normalisation.
 248
 249             with m.State("normalise_2"):
 250                 self.normalise_2(m, z, of, "round")
 251
 252             # ******
 253             # rounding stage
 254
 255             with m.State("round"):
 256                 self.roundz(m, z, of.roundz)
 257                 m.next = "corrections"
 258
 259             # ******
 260             # correction stage
 261
 262             with m.State("corrections"):
 263                 self.corrections(m, z, "pack")
 264
 265             # ******
 266             # pack stage
 267
 268             with m.State("pack"):
 269                 self.pack(m, z, "put_z")
 270
 271             # ******
 272             # put_z stage
 273
 274             with m.State("put_z"):
 275                 self.put_z(m, z, self.out_z, "get_a")
 276
 277         return m
 278
 279
 280 if __name__ == "__main__":
 281     alu = FPADD(width=32)
 282     main(alu, ports=alu.in_a.ports() + alu.in_b.ports() + alu.out_z.ports())
 283
 284
 285     # works... but don't use, just do "python fname.py convert -t v"
 286     #print (verilog.convert(alu, ports=[
 287     #                        ports=alu.in_a.ports() + \
 288     #                              alu.in_b.ports() + \
 289     #                              alu.out_z.ports())