add mul pipeline version of specialcases
[ieee754fpu.git] / src / ieee754 / fpmul / specialcases.py
1 # IEEE Floating Point Multiplier
2
3 from nmigen import Module, Signal, Cat, Const
4 from nmigen.cli import main, verilog
5 from math import log
6
7 from ieee754.fpcommon.fpbase import FPNumDecode
8 from nmutil.singlepipe import SimpleHandshake, StageChain
9
10 from ieee754.fpcommon.fpbase import FPState, FPID
11 from ieee754.fpcommon.getop import FPADDBaseData
12 from ieee754.fpcommon.denorm import (FPSCData, FPAddDeNormMod)
13
14
15 class FPMulSpecialCasesMod:
16 """ special cases: NaNs, infs, zeros, denormalised
17 see "Special Operations"
18 https://steve.hollasch.net/cgindex/coding/ieeefloat.html
19 """
20
21 def __init__(self, width, id_wid):
22 self.width = width
23 self.id_wid = id_wid
24 self.i = self.ispec()
25 self.o = self.ospec()
26
27 def ispec(self):
28 return FPADDBaseData(self.width, self.id_wid)
29
30 def ospec(self):
31 return FPSCData(self.width, self.id_wid)
32
33 def setup(self, m, i):
34 """ links module to inputs and outputs
35 """
36 m.submodules.specialcases = self
37 m.d.comb += self.i.eq(i)
38
39 def process(self, i):
40 return self.o
41
42 def elaborate(self, platform):
43 m = Module()
44
45 m.submodules.sc_out_z = self.o.z
46
47 # decode: XXX really should move to separate stage
48 a1 = FPNumDecode(None, self.width)
49 b1 = FPNumDecode(None, self.width)
50 m.submodules.sc_decode_a = a1
51 m.submodules.sc_decode_b = b1
52 m.d.comb += [a1.v.eq(self.i.a),
53 b1.v.eq(self.i.b),
54 self.o.a.eq(a1),
55 self.o.b.eq(b1)
56 ]
57
58 s_nomatch = Signal(reset_less=True)
59 m.d.comb += s_nomatch.eq(a1.s != b1.s)
60
61 m_match = Signal(reset_less=True)
62 m.d.comb += m_match.eq(a1.m == b1.m)
63
64 e_match = Signal(reset_less=True)
65 m.d.comb += e_match.eq(a1.e == b1.e)
66
67 aeqmb = Signal(reset_less=True)
68 m.d.comb += aeqmb.eq(s_nomatch & m_match & e_match)
69
70 obz = Signal(reset_less=True)
71 m.d.comb += obz.eq(a1.is_zero & b1.is_zero)
72
73 sabx = Signal(reset_less=True) # sign a xor b (sabx, get it?)
74 m.d.comb += sabx.eq(a1.s ^ b1.s)
75
76 # if a is NaN or b is NaN return NaN
77 with m.If(abnan):
78 m.d.comb += self.o.out_do_z.eq(1)
79 m.d.comb += self.o.z.nan(1)
80
81 # if a is inf return inf (or NaN)
82 with m.Elif(a1.is_inf):
83 m.d.comb += self.o.out_do_z.eq(1)
84 m.d.comb += self.o.z.inf(sabx)
85 # b is zero return NaN
86 with m.If(b1.is_zero):
87 m.d.comb += self.o.z.nan(1)
88
89 # if b is inf return inf (or NaN)
90 with m.Elif(b1.is_inf):
91 m.d.comb += self.o.out_do_z.eq(1)
92 m.d.comb += self.o.z.inf(sabx)
93 # a is zero return NaN
94 with m.If(a1.is_zero):
95 m.d.comb += self.o.z.nan(1)
96
97 # if a is zero or b zero return signed-a/b
98 with m.Elif(obz):
99 m.d.comb += self.o.out_do_z.eq(1)
100 m.d.comb += self.o.z.zero(sabx)
101
102 # Denormalised Number checks next, so pass a/b data through
103 with m.Else():
104 m.d.comb += self.o.out_do_z.eq(0)
105
106 m.d.comb += self.o.oz.eq(self.o.z.v)
107 m.d.comb += self.o.mid.eq(self.i.mid)
108
109 return m
110
111
112 class FPMulSpecialCases(FPState):
113 """ special cases: NaNs, infs, zeros, denormalised
114 NOTE: some of these are unique to add. see "Special Operations"
115 https://steve.hollasch.net/cgindex/coding/ieeefloat.html
116 """
117
118 def __init__(self, width, id_wid):
119 FPState.__init__(self, "special_cases")
120 self.mod = FPAddSpecialCasesMod(width)
121 self.out_z = self.mod.ospec()
122 self.out_do_z = Signal(reset_less=True)
123
124 def setup(self, m, i):
125 """ links module to inputs and outputs
126 """
127 self.mod.setup(m, i, self.out_do_z)
128 m.d.sync += self.out_z.v.eq(self.mod.out_z.v) # only take the output
129 m.d.sync += self.out_z.mid.eq(self.mod.o.mid) # (and mid)
130
131 def action(self, m):
132 self.idsync(m)
133 with m.If(self.out_do_z):
134 m.next = "put_z"
135 with m.Else():
136 m.next = "denormalise"
137
138
139 class FPMulSpecialCasesDeNorm(FPState, SimpleHandshake):
140 """ special cases: NaNs, infs, zeros, denormalised
141 """
142
143 def __init__(self, width, id_wid):
144 FPState.__init__(self, "special_cases")
145 self.width = width
146 self.id_wid = id_wid
147 SimpleHandshake.__init__(self, self) # pipe is its own stage
148 self.out = self.ospec()
149
150 def ispec(self):
151 return FPADDBaseData(self.width, self.id_wid) # SpecialCases ispec
152
153 def ospec(self):
154 return FPSCData(self.width, self.id_wid) # DeNorm ospec
155
156 def setup(self, m, i):
157 """ links module to inputs and outputs
158 """
159 smod = FPMulSpecialCasesMod(self.width, self.id_wid)
160 dmod = FPAddDeNormMod(self.width, self.id_wid)
161
162 chain = StageChain([smod, dmod])
163 chain.setup(m, i)
164
165 # only needed for break-out (early-out)
166 # self.out_do_z = smod.o.out_do_z
167
168 self.o = dmod.o
169
170 def process(self, i):
171 return self.o
172
173 def action(self, m):
174 # for break-out (early-out)
175 #with m.If(self.out_do_z):
176 # m.next = "put_z"
177 #with m.Else():
178 m.d.sync += self.out.eq(self.process(None))
179 m.next = "align"
180
181