remove extra arg from old roundz function

[ieee754fpu.git] / src / add / fmul.py

diff --git a/src/add/fmul.py b/src/add/fmul.py
index 8e3ea7d5ff4a1c86eb4ed156a13b839c91d42cbe..9ed2bf39b9bb67392c602b91484e8b8fdf47ce17 100644 (file)
--- a/src/add/fmul.py
+++ b/src/add/fmul.py
@@ -127,7 +127,7 @@ class FPMUL(FPBase):
             # rounding stage
 
             with m.State("round"):
-                self.roundz(m, z, z, of.roundz)
+                #self.roundz(m, z, of.roundz)
                 m.next = "corrections"
 
             # ******