get roundz state to put answer in explicit output, sync it to z afterwards

diff --git a/src/add/fpbase.py b/src/add/fpbase.py
index 10997be40cd1b1cc9198ed978faa329b9f87e91f..ec9f0bd09320a75c769d4a2e664e55898f71f956 100644 (file)
--- a/src/add/fpbase.py
+++ b/src/add/fpbase.py
@@ -133,6 +133,9 @@ class FPNumBase:
     def _is_denormalised(self):
         return (self.exp_n126) & (self.m_msbzero)
 
+    def copy(self, inp):
+        return [self.s.eq(inp.s), self.e.eq(inp.e), self.m.eq(inp.m)]
+
 
 class FPNumOut(FPNumBase):
     """ Floating-point Number Class
@@ -348,7 +351,7 @@ class FPOp:
             stb = stb & extra
         return [self.v.eq(in_op.v),          # receive value
                 self.stb.eq(stb),      # receive STB
-                in_op.ack.eq(self.ack), # send ACK
+                in_op.ack.eq(~self.ack), # send ACK
                ]
 
     def chain_from(self, in_op, extra=None):
@@ -471,14 +474,15 @@ class FPBase:
         with m.Else():
             m.next = next_state
 
-    def roundz(self, m, z, of, next_state):
+    def roundz(self, m, z, out_z, of, next_state):
         """ performs rounding on the output.  TODO: different kinds of rounding
         """
         m.next = next_state
+        m.d.comb += out_z.copy(z) # copies input to output first
         with m.If(of.roundz):
-            m.d.sync += z.m.eq(z.m + 1) # mantissa rounds up
+            m.d.comb += out_z.m.eq(z.m + 1) # mantissa rounds up
             with m.If(z.m == z.m1s): # all 1s
-                m.d.sync += z.e.eq(z.e + 1) # exponent rounds up
+                m.d.comb += out_z.e.eq(z.e + 1) # exponent rounds up
 
     def corrections(self, m, z, next_state):
         """ denormalisation and sign-bug corrections

diff --git a/src/add/nmigen_add_experiment.py b/src/add/nmigen_add_experiment.py
index f7a1d9127c3495c8cc78754747f2cf38acff4b83..883ffbc1de2ac31648be6b7b67a0cc023b2f995e 100644 (file)
--- a/src/add/nmigen_add_experiment.py
+++ b/src/add/nmigen_add_experiment.py
@@ -5,7 +5,7 @@
 from nmigen import Module, Signal, Cat
 from nmigen.cli import main, verilog
 
-from fpbase import FPNumIn, FPNumOut, FPOp, Overflow, FPBase
+from fpbase import FPNumIn, FPNumOut, FPOp, Overflow, FPBase, FPNumBase
 
 
 class FPState(FPBase):
@@ -244,7 +244,9 @@ class FPNorm2(FPState):
 class FPRound(FPState):
 
     def action(self, m):
-        self.roundz(m, self.z, self.of, "corrections")
+        out_z = FPNumBase(self.z.width)
+        self.roundz(m, self.z, out_z, self.of, "corrections")
+        m.d.sync += self.z.copy(out_z)
 
 
 class FPCorrections(FPState):