ieee754fpu.git
5 years agoadd extra comment block explaining pipe stage example
Luke Kenneth Casson Leighton [Fri, 15 Mar 2019 08:47:21 +0000 (08:47 +0000)]
add extra comment block explaining pipe stage example

5 years agoinverted busy signal and named it "ready"
Luke Kenneth Casson Leighton [Fri, 15 Mar 2019 08:37:18 +0000 (08:37 +0000)]
inverted busy signal and named it "ready"

5 years agorename stb to "valid"
Luke Kenneth Casson Leighton [Fri, 15 Mar 2019 08:29:56 +0000 (08:29 +0000)]
rename stb to "valid"

5 years agocreate classes for STB/BUSY, split in from out
Luke Kenneth Casson Leighton [Fri, 15 Mar 2019 08:28:18 +0000 (08:28 +0000)]
create classes for STB/BUSY, split in from out

5 years agoadd use of FPState, not being used yet
Luke Kenneth Casson Leighton [Fri, 15 Mar 2019 00:31:30 +0000 (00:31 +0000)]
add use of FPState, not being used yet

5 years agosplit pipeline test into 2 functions, one send, one receive
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 13:32:06 +0000 (13:32 +0000)]
split pipeline test into 2 functions, one send, one receive

5 years agogot fpdiv up and running again
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 06:33:10 +0000 (06:33 +0000)]
got fpdiv up and running again

5 years agoforgot to add submodules
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 05:41:02 +0000 (05:41 +0000)]
forgot to add submodules

5 years agogot rounding working again for fmul
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 05:09:36 +0000 (05:09 +0000)]
got rounding working again for fmul

5 years agoremove extra arg from old roundz function
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 04:42:53 +0000 (04:42 +0000)]
remove extra arg from old roundz function

5 years agomake a bit of a mess of the unit tests, getting mul up and running again
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 04:33:01 +0000 (04:33 +0000)]
make a bit of a mess of the unit tests, getting mul up and running again
taking a copy (sigh) of the old version of check_case and get_case

5 years agoget roundz working again, needed for mul stage
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 04:17:28 +0000 (04:17 +0000)]
get roundz working again, needed for mul stage

5 years agoadd new FPNormaliseSingleMod, not tested
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 04:16:28 +0000 (04:16 +0000)]
add new FPNormaliseSingleMod, not tested

5 years agostart to get fpmul back up and running
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 03:18:06 +0000 (03:18 +0000)]
start to get fpmul back up and running

5 years agoreplace copy of FPState with import of FPState
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 03:04:33 +0000 (03:04 +0000)]
replace copy of FPState with import of FPState

5 years agoupdate comments
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 02:54:57 +0000 (02:54 +0000)]
update comments

5 years agoStarted to update fmul.py to new conventions
Aleksandar Kostovic [Wed, 13 Mar 2019 17:39:14 +0000 (18:39 +0100)]
Started to update fmul.py to new conventions

5 years agoincrease data set to throw at pipeline in tests
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 12:39:09 +0000 (12:39 +0000)]
increase data set to throw at pipeline in tests

5 years agoadd random-busy, random-send single and dual buffered pipeline tests
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 11:48:10 +0000 (11:48 +0000)]
add random-busy, random-send single and dual buffered pipeline tests

5 years agosplit out actual pipeline stage into separate class
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 11:01:22 +0000 (11:01 +0000)]
split out actual pipeline stage into separate class

5 years agoadd 2 stage buffered pipeline unit test, reduce to 16-bit to make vcd clearer
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 07:26:23 +0000 (07:26 +0000)]
add 2 stage buffered pipeline unit test, reduce to 16-bit to make vcd clearer

5 years agoonly process data if the input strobe is valid
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 04:26:24 +0000 (04:26 +0000)]
only process data if the input strobe is valid

5 years agoadd in some assertions to check pipe output
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 04:24:50 +0000 (04:24 +0000)]
add in some assertions to check pipe output

5 years agosplit out unit test in buf pipe example
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 03:49:48 +0000 (03:49 +0000)]
split out unit test in buf pipe example

5 years agocombine blocks to add list of statements, add comments
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 03:47:49 +0000 (03:47 +0000)]
combine blocks to add list of statements, add comments

5 years agoupdate comments
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 03:35:41 +0000 (03:35 +0000)]
update comments

5 years agostore inv-strobe in temp signal
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 03:11:05 +0000 (03:11 +0000)]
store inv-strobe in temp signal

5 years agoclean up code
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 03:10:44 +0000 (03:10 +0000)]
clean up code

5 years agostore processed input in intermediary
Luke Kenneth Casson Leighton [Tue, 12 Mar 2019 15:14:13 +0000 (15:14 +0000)]
store processed input in intermediary

5 years agoadd (but comment out) reset signal
Luke Kenneth Casson Leighton [Tue, 12 Mar 2019 13:22:20 +0000 (13:22 +0000)]
add (but comment out) reset signal

5 years agoadd example buffered pipe
Luke Kenneth Casson Leighton [Tue, 12 Mar 2019 13:14:17 +0000 (13:14 +0000)]
add example buffered pipe

5 years agoadd example buffered pipe
Luke Kenneth Casson Leighton [Tue, 12 Mar 2019 13:13:33 +0000 (13:13 +0000)]
add example buffered pipe

5 years agoget InputGroup running
Luke Kenneth Casson Leighton [Mon, 11 Mar 2019 19:09:39 +0000 (19:09 +0000)]
get InputGroup running

5 years agoadd inputgroup test
Luke Kenneth Casson Leighton [Mon, 11 Mar 2019 12:54:57 +0000 (12:54 +0000)]
add inputgroup test

5 years agoTrigger needs to be combinatorial (saves clock cycles)
Luke Kenneth Casson Leighton [Mon, 11 Mar 2019 12:54:32 +0000 (12:54 +0000)]
Trigger needs to be combinatorial (saves clock cycles)

5 years agoreturn mid as part of ports
Luke Kenneth Casson Leighton [Mon, 11 Mar 2019 12:32:48 +0000 (12:32 +0000)]
return mid as part of ports

5 years agowhoops, forgot to make input an Array, can use array indexing now
Luke Kenneth Casson Leighton [Mon, 11 Mar 2019 12:32:09 +0000 (12:32 +0000)]
whoops, forgot to make input an Array, can use array indexing now

5 years agocreate an FPOps output class to clean up the InputGroup
Luke Kenneth Casson Leighton [Mon, 11 Mar 2019 11:26:45 +0000 (11:26 +0000)]
create an FPOps output class to clean up the InputGroup

5 years agoadd capability to pass through operands and muxid to output
Luke Kenneth Casson Leighton [Mon, 11 Mar 2019 11:15:29 +0000 (11:15 +0000)]
add capability to pass through operands and muxid to output

5 years agomake a start on an InputGroup module
Luke Kenneth Casson Leighton [Mon, 11 Mar 2019 09:37:19 +0000 (09:37 +0000)]
make a start on an InputGroup module

5 years agoadd a multi-input stb/ack module
Luke Kenneth Casson Leighton [Mon, 11 Mar 2019 08:42:21 +0000 (08:42 +0000)]
add a multi-input stb/ack module

to be used for acknowledging and passing on multiple inputs once all ready

5 years agoadd result array module
Luke Kenneth Casson Leighton [Mon, 11 Mar 2019 07:06:51 +0000 (07:06 +0000)]
add result array module

5 years agocreate array of in/outs however set muxid to zero temporarily
Luke Kenneth Casson Leighton [Sun, 10 Mar 2019 08:42:43 +0000 (08:42 +0000)]
create array of in/outs however set muxid to zero temporarily

5 years agostore fpadd result in putz, next phase: direct to array of output results
Luke Kenneth Casson Leighton [Sun, 10 Mar 2019 07:05:55 +0000 (07:05 +0000)]
store fpadd result in putz, next phase: direct to array of output results

5 years agoallow code-creation
Luke Kenneth Casson Leighton [Sun, 10 Mar 2019 03:37:36 +0000 (03:37 +0000)]
allow code-creation

5 years agocreate array of in_a, in_b and out_z
Luke Kenneth Casson Leighton [Sun, 10 Mar 2019 03:34:38 +0000 (03:34 +0000)]
create array of in_a, in_b and out_z

5 years agomove ids to member variable
Luke Kenneth Casson Leighton [Sun, 10 Mar 2019 03:22:31 +0000 (03:22 +0000)]
move ids to member variable

5 years agochain add stage 0 and 1 together with align in combinatorial block
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 11:23:05 +0000 (11:23 +0000)]
chain add stage 0 and 1 together with align in combinatorial block

5 years agocreate combined combinatorial align and add0
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 11:11:27 +0000 (11:11 +0000)]
create combined combinatorial align and add0

5 years agomerge specialcases and denorm into single combinatorial chain
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 11:01:29 +0000 (11:01 +0000)]
merge specialcases and denorm into single combinatorial chain

5 years agocreate specialcasesmod setup fn
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 10:46:54 +0000 (10:46 +0000)]
create specialcasesmod setup fn

5 years agowhoops forgot self.width
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 10:03:49 +0000 (10:03 +0000)]
whoops forgot self.width

5 years agoadd comments
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 10:03:28 +0000 (10:03 +0000)]
add comments

5 years agomove localiseable variables to local function
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 10:00:37 +0000 (10:00 +0000)]
move localiseable variables to local function

5 years agoconnect corrections to pack with combinatorial logic
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 09:54:03 +0000 (09:54 +0000)]
connect corrections to pack with combinatorial logic

5 years agoconnect round directly to corrections with combinatorial logic
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 09:34:04 +0000 (09:34 +0000)]
connect round directly to corrections with combinatorial logic

5 years agoconnect normalisation directly to round with combinatorial logic
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 09:24:50 +0000 (09:24 +0000)]
connect normalisation directly to round with combinatorial logic

5 years agobig reorganisation
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 09:13:47 +0000 (09:13 +0000)]
big reorganisation

splitting out Normalisation Single/Multi
adding beginnings of combinatorial-chained normalisation thru pack

5 years agosplit out into 2 functions, longer and compact fragment
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 07:25:28 +0000 (07:25 +0000)]
split out into 2 functions, longer and compact fragment

5 years agomove in_t_ack into FPGet2Op setup
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 07:18:47 +0000 (07:18 +0000)]
move in_t_ack into FPGet2Op setup

5 years agoadd "compact" option
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 07:18:01 +0000 (07:18 +0000)]
add "compact" option

5 years agomain on FPADD not on FPADDBase
Luke Kenneth Casson Leighton [Fri, 8 Mar 2019 12:59:11 +0000 (12:59 +0000)]
main on FPADD not on FPADDBase

5 years agobig reorg, got FPADD to work using new FPADDBase
Luke Kenneth Casson Leighton [Fri, 8 Mar 2019 12:53:15 +0000 (12:53 +0000)]
big reorg, got FPADD to work using new FPADDBase

5 years agoadd some comments to FPAddBase
Luke Kenneth Casson Leighton [Wed, 6 Mar 2019 21:46:01 +0000 (21:46 +0000)]
add some comments to FPAddBase

5 years agoin the middle of rewiring FPADD to use FPADDBase
Luke Kenneth Casson Leighton [Wed, 6 Mar 2019 12:14:47 +0000 (12:14 +0000)]
in the middle of rewiring FPADD to use FPADDBase

5 years agosplit out main stages of add to separate class, FPADDBase
Luke Kenneth Casson Leighton [Wed, 6 Mar 2019 06:09:15 +0000 (06:09 +0000)]
split out main stages of add to separate class, FPADDBase

5 years agoadd function unit module
Luke Kenneth Casson Leighton [Wed, 6 Mar 2019 06:08:20 +0000 (06:08 +0000)]
add function unit module

5 years agocorrect syntax error
Luke Kenneth Casson Leighton [Wed, 6 Mar 2019 06:08:09 +0000 (06:08 +0000)]
correct syntax error

5 years agoadd reservation station row module
Luke Kenneth Casson Leighton [Tue, 5 Mar 2019 03:06:04 +0000 (03:06 +0000)]
add reservation station row module

5 years agoadd MID testing
Luke Kenneth Casson Leighton [Tue, 5 Mar 2019 02:50:36 +0000 (02:50 +0000)]
add MID testing

5 years agoadd id to pack and putz
Luke Kenneth Casson Leighton [Tue, 5 Mar 2019 02:36:50 +0000 (02:36 +0000)]
add id to pack and putz

5 years agoadd id to FPPack
Luke Kenneth Casson Leighton [Tue, 5 Mar 2019 02:33:16 +0000 (02:33 +0000)]
add id to FPPack

5 years agoadd id to FPCorrections
Luke Kenneth Casson Leighton [Tue, 5 Mar 2019 02:30:20 +0000 (02:30 +0000)]
add id to FPCorrections

5 years agoadd id to FPRound
Luke Kenneth Casson Leighton [Tue, 5 Mar 2019 02:28:48 +0000 (02:28 +0000)]
add id to FPRound

5 years agoadd id to norm1
Luke Kenneth Casson Leighton [Tue, 5 Mar 2019 02:26:13 +0000 (02:26 +0000)]
add id to norm1

5 years agoadd id to stage1
Luke Kenneth Casson Leighton [Tue, 5 Mar 2019 02:24:54 +0000 (02:24 +0000)]
add id to stage1

5 years agoadd id to stage0
Luke Kenneth Casson Leighton [Tue, 5 Mar 2019 02:22:19 +0000 (02:22 +0000)]
add id to stage0

5 years agoadd id to align
Luke Kenneth Casson Leighton [Tue, 5 Mar 2019 02:18:39 +0000 (02:18 +0000)]
add id to align

5 years agoadd id to denorm
Luke Kenneth Casson Leighton [Tue, 5 Mar 2019 02:15:21 +0000 (02:15 +0000)]
add id to denorm

5 years agoadd id passthrough to specialcases class
Luke Kenneth Casson Leighton [Tue, 5 Mar 2019 00:58:31 +0000 (00:58 +0000)]
add id passthrough to specialcases class

5 years agoreorg special cases setup
Luke Kenneth Casson Leighton [Mon, 4 Mar 2019 23:41:18 +0000 (23:41 +0000)]
reorg special cases setup

5 years agoadd id_width to parameters
Luke Kenneth Casson Leighton [Mon, 4 Mar 2019 23:38:19 +0000 (23:38 +0000)]
add id_width to parameters

5 years agoremove unneeded code
Luke Kenneth Casson Leighton [Mon, 4 Mar 2019 10:59:07 +0000 (10:59 +0000)]
remove unneeded code

5 years agoreorg setup functions in more add phases
Luke Kenneth Casson Leighton [Mon, 4 Mar 2019 10:57:08 +0000 (10:57 +0000)]
reorg setup functions in more add phases

5 years agocleanup modules, however multi-cycle align needs to be like norm1
Luke Kenneth Casson Leighton [Mon, 4 Mar 2019 06:03:48 +0000 (06:03 +0000)]
cleanup modules, however multi-cycle align needs to be like norm1

5 years agosplit out single-cycle normalisation to separate module
Luke Kenneth Casson Leighton [Mon, 4 Mar 2019 05:39:06 +0000 (05:39 +0000)]
split out single-cycle normalisation to separate module

5 years agoenable single-cycle in FP16 test
Luke Kenneth Casson Leighton [Mon, 4 Mar 2019 05:38:45 +0000 (05:38 +0000)]
enable single-cycle in FP16 test

5 years agosingle-shift normalisation right-shift: normalisation now a single-cycle phase
Luke Kenneth Casson Leighton [Mon, 4 Mar 2019 04:25:56 +0000 (04:25 +0000)]
single-shift normalisation right-shift: normalisation now a single-cycle phase

5 years agouse MultiShiftRMerge module instead of shift_down_multi function
Luke Kenneth Casson Leighton [Mon, 4 Mar 2019 04:13:02 +0000 (04:13 +0000)]
use MultiShiftRMerge module instead of shift_down_multi function

5 years agoremove chain dependence, calculate ediffs in parallel with comparisons
Luke Kenneth Casson Leighton [Mon, 4 Mar 2019 02:34:35 +0000 (02:34 +0000)]
remove chain dependence, calculate ediffs in parallel with comparisons

5 years agocomment out unneeded code for now
Luke Kenneth Casson Leighton [Mon, 4 Mar 2019 02:26:23 +0000 (02:26 +0000)]
comment out unneeded code for now

5 years agoconvert to only use one multi-shifter
Luke Kenneth Casson Leighton [Mon, 4 Mar 2019 02:25:56 +0000 (02:25 +0000)]
convert to only use one multi-shifter

5 years agorename stickybit variable
Luke Kenneth Casson Leighton [Mon, 4 Mar 2019 01:11:10 +0000 (01:11 +0000)]
rename stickybit variable

5 years agounit test for multi-bit shift right with merge (sticky bit)
Luke Kenneth Casson Leighton [Sun, 3 Mar 2019 23:13:51 +0000 (23:13 +0000)]
unit test for multi-bit shift right with merge (sticky bit)

5 years agocleanup
Luke Kenneth Casson Leighton [Sun, 3 Mar 2019 10:12:51 +0000 (10:12 +0000)]
cleanup

5 years agosmall optimisation, move subtraction of -126 from exponent into FPNumBase module...
Luke Kenneth Casson Leighton [Sun, 3 Mar 2019 10:12:04 +0000 (10:12 +0000)]
small optimisation, move subtraction of -126 from exponent into FPNumBase module, use it there and in normalisation

5 years agoadd 3 extra unit tests
Luke Kenneth Casson Leighton [Sun, 3 Mar 2019 09:59:56 +0000 (09:59 +0000)]
add 3 extra unit tests

5 years agolimit count leading zeros to stop exponent shift-amount going below min exp
Luke Kenneth Casson Leighton [Sun, 3 Mar 2019 09:55:44 +0000 (09:55 +0000)]
limit count leading zeros to stop exponent shift-amount going below min exp

5 years agofix shift class syntax errors (untested)
Luke Kenneth Casson Leighton [Sun, 3 Mar 2019 09:52:54 +0000 (09:52 +0000)]
fix shift class syntax errors (untested)

5 years agouse priority encoder for normalisation in single cycle (done decrease)
Luke Kenneth Casson Leighton [Sun, 3 Mar 2019 02:34:20 +0000 (02:34 +0000)]
use priority encoder for normalisation in single cycle (done decrease)