- \item Goal is to create a mass-volume low-power embedded SoC suitable
- for use in netbooks, chromebooks, tablets, smartphones, IoT SBCs.
- \item No way we could implement a project of this magnitude without
- nmigen (being able to use python OO to HDL)
- \item Collaboration with OpenPOWER Foundation and Members absolutely
- essential. No short-cuts. Standards to be developed and ratified
- so that everyone benefits.
- \item Riding the wave of huge stability of OpenPOWER ecosystem
- \item Greatly simplified open 3D and Video drivers reduces product
- development costs for customers
- \item It also happens to be fascinating, deeply rewarding technically
- challenging, and funded by NLnet
-
+ \item SIMD fundamentally assumes element independence.
+ \item No provision in SIMD ISAs or Architectures for
+ inter-element inter-dependence, let alone sequential
+ inter-dependence.
+ \item Simple-V adds features such as Data-Dependent
+ Fail-First as \textit{general concepts},
+ exploiting Condition Registers (Vectorised)
+ \item Hardware Parallelism is \textit{still possible}
+ by exploiting the standard capabilities of
+ Speculative Execution: produce results, hold
+ off writing, post-analyse and cancel the results
+ that should not be written. Uses \textit{existing}
+ standard OoO Micro-architecture
+ \item Huge simplification of algorithms, huge "compactification"
+ just like Zilog Z80 and Intel 8086, yet still parallel
+ \item compact deep-expressive assembler brings CISC
+ capability but RISC-RISC (Prefix-Suffix). SIMD remains
+ at the \textit{back-end in hardware} where it belongs.
+ Not exposed at the programmer.