src/main/scala/devices/gpio/GPIOPeriphery.scala

   1 // See LICENSE for license details.
   2 package sifive.blocks.devices.gpio
   3
   4 import Chisel._
   5 import freechips.rocketchip.config.Field
   6 import freechips.rocketchip.diplomacy.{LazyModule,LazyMultiIOModuleImp}
   7 import freechips.rocketchip.chip.HasSystemNetworks
   8 import freechips.rocketchip.tilelink.TLFragmenter
   9 import freechips.rocketchip.util.HeterogeneousBag
  10
  11 case object PeripheryGPIOKey extends Field[Seq[GPIOParams]]
  12
  13 trait HasPeripheryGPIO extends HasSystemNetworks {
  14   val gpioParams = p(PeripheryGPIOKey)
  15   val gpio = gpioParams map {params =>
  16     val gpio = LazyModule(new TLGPIO(peripheryBusBytes, params))
  17     gpio.node := TLFragmenter(peripheryBusBytes, cacheBlockBytes)(peripheryBus.node)
  18     intBus.intnode := gpio.intnode
  19     gpio
  20   }
  21 }
  22
  23 trait HasPeripheryGPIOBundle {
  24   val gpio: HeterogeneousBag[GPIOPortIO]
  25 }
  26
  27 trait HasPeripheryGPIOModuleImp extends LazyMultiIOModuleImp with HasPeripheryGPIOBundle {
  28   val outer: HasPeripheryGPIO
  29   val gpio = IO(HeterogeneousBag(outer.gpioParams.map(new GPIOPortIO(_))))
  30
  31   (gpio zip outer.gpio) foreach { case (io, device) =>
  32     io <> device.module.io.port
  33   }
  34 }