src/main/scala/devices/jtag/JTAGPins.scala

   1 // See LICENSE for license details.
   2 package sifive.blocks.devices.jtag
   3
   4 import Chisel._
   5
   6 // ------------------------------------------------------------
   7 // SPI, UART, etc are with their respective packages,
   8 // JTAG doesn't really correspond directly to a device, but it does
   9 // define pins as those devices do.
  10 // ------------------------------------------------------------
  11
  12 import freechips.rocketchip.config._
  13 import freechips.rocketchip.jtag.{JTAGIO}
  14 import sifive.blocks.devices.pinctrl.{Pin, PinCtrl}
  15
  16 class JTAGSignals[T <: Data](pingen: () => T, hasTRSTn: Boolean = true) extends Bundle {
  17   val TCK         = pingen()
  18   val TMS         = pingen()
  19   val TDI         = pingen()
  20   val TDO        = pingen()
  21   val TRSTn = if (hasTRSTn) Option(pingen()) else None
  22 }
  23
  24 class JTAGPins[T <: Pin](pingen: () => T, hasTRSTn: Boolean = true) extends JTAGSignals[T](pingen, hasTRSTn)
  25
  26 object JTAGPinsFromPort {
  27
  28   def apply[T <: Pin] (pins: JTAGSignals[T], jtag: JTAGIO): Unit = {
  29     jtag.TCK  := pins.TCK.inputPin (pue = Bool(true)).asClock
  30     jtag.TMS  := pins.TMS.inputPin (pue = Bool(true))
  31     jtag.TDI  := pins.TDI.inputPin(pue = Bool(true))
  32     jtag.TRSTn.foreach{t => t := pins.TRSTn.get.inputPin(pue = Bool(true))}
  33
  34     pins.TDO.outputPin(jtag.TDO.data)
  35     pins.TDO.o.oe := jtag.TDO.driven
  36   }
  37 }