axi4: switch to new pipelined converters axi-mmio
authorWesley W. Terpstra <wesley@sifive.com>
Wed, 26 Apr 2017 20:10:50 +0000 (13:10 -0700)
committerWesley W. Terpstra <wesley@sifive.com>
Wed, 26 Apr 2017 20:10:50 +0000 (13:10 -0700)
commita24fa9b444c3e33e356e83dba07572b26098f17e
tree6f17f6ef25f6f07855f6be72b2368899a85c7148
parent6eddf517a38156a22b9b831ba92626673a11d603
axi4: switch to new pipelined converters
src/main/scala/devices/xilinxvc707mig/XilinxVC707MIG.scala
src/main/scala/devices/xilinxvc707pciex1/XilinxVC707PCIeX1.scala
src/main/scala/ip/xilinx/vc707axi_to_pcie_x1/vc707axi_to_pcie_x1.scala