spi: add dts ranges field for memory mapped spi (#19)
authorWesley W. Terpstra <wesley@sifive.com>
Thu, 15 Jun 2017 00:06:55 +0000 (17:06 -0700)
committerGitHub <noreply@github.com>
Thu, 15 Jun 2017 00:06:55 +0000 (17:06 -0700)
src/main/scala/devices/spi/TLSPI.scala
src/main/scala/devices/spi/TLSPIFlash.scala

index 5c5b9bfe5409fd91a1bd411e16d5cbc420a14283..5833fad7a9669c85d2c8b1a6cdce9d3282f63d7c 100644 (file)
@@ -109,7 +109,15 @@ class SPITopModule[B <: SPITopBundle](c: SPIParamsBase, bundle: => B, outer: TLS
 
 abstract class TLSPIBase(w: Int, c: SPIParamsBase)(implicit p: Parameters) extends LazyModule {
   require(isPow2(c.rSize))
-  val device = new SimpleDevice("spi", Seq("sifive,spi0"))
+  val device = new SimpleDevice("spi", Seq("sifive,spi0")) {
+    override def describe(resources: ResourceBindings): Description = {
+      val Description(name, mapping) = super.describe(resources)
+      val rangesSeq = resources("ranges").map(_.value)
+      val ranges = if (rangesSeq.isEmpty) Map() else Map("ranges" -> rangesSeq)
+      Description(name, mapping ++ ranges)
+    }
+  }
+
   val rnode = TLRegisterNode(address = Seq(AddressSet(c.rAddress, c.rSize-1)), device = device, beatBytes = w)
   val intnode = IntSourceNode(IntSourcePortSimple(resources = device.int))
 }
index 752aa5f6562d52bf7f7fb59fb281964d324ac4f8..fc786f58ff8488ccde6d49217b7425f8b0a6c609 100644 (file)
@@ -95,6 +95,7 @@ abstract class TLSPIFlashBase(w: Int, c: SPIFlashParamsBase)(implicit p: Paramet
   require(isPow2(c.fSize))
   val fnode = TLManagerNode(1, TLManagerParameters(
     address     = Seq(AddressSet(c.fAddress, c.fSize-1)),
+    resources   = Seq(Resource(device, "ranges")),
     regionType  = RegionType.UNCACHED,
     executable  = true,
     supportsGet = TransferSizes(1, 1),