add undef()

diff --git a/src/soc/decoder/helpers.py b/src/soc/decoder/helpers.py
index 41ab2c789c337c8075a01985adcc1ffb6ce2fdba..b1d8b87f3298e8cf9366d5cf914bc454716cbd09 100644 (file)
--- a/src/soc/decoder/helpers.py
+++ b/src/soc/decoder/helpers.py
@@ -129,6 +129,13 @@ def le(a, b):
 def length(a):
     return len(a)
 
+
+def undef(v):
+    """ function that, for Power spec purposes, returns undefined bits of
+        the same shape as the input bits, however, for purposes of matching
+        POWER9's behavior returns the input bits unchanged."""
+    return v
+
 # For these tests I tried to find power instructions that would let me
 # isolate each of these helper operations. So for instance, when I was
 # testing the MASK() function, I chose rlwinm and rldicl because if I

diff --git a/src/soc/decoder/pseudo/pywriter.py b/src/soc/decoder/pseudo/pywriter.py
index 6cf005f059042ccf9581667b0cad746e5c5dd167..5e8c1492465ac0900b1ca8b60d86d5a028efab87 100644 (file)
--- a/src/soc/decoder/pseudo/pywriter.py
+++ b/src/soc/decoder/pseudo/pywriter.py
@@ -23,7 +23,7 @@ from soc.decoder.isa.caller import inject, instruction_info
 from soc.decoder.helpers import (EXTS, EXTS64, EXTZ64, ROTL64, ROTL32, MASK,
                                  ne, eq, gt, ge, lt, le, ltu, gtu, length,
                                  trunc_divs, trunc_rems, MULS, DIVS, MODS,
-                                 EXTS128)
+                                 EXTS128, undef)
 from soc.decoder.selectable_int import SelectableInt
 from soc.decoder.selectable_int import selectconcat as concat
 from soc.decoder.orderedset import OrderedSet