implement main part of test_loadstore1_ifetch_invalid()

diff --git a/src/soc/experiment/test/test_loadstore1.py b/src/soc/experiment/test/test_loadstore1.py
index a4a821775b6b9a12383602c0d20ecfdd46714d4b..38c0629657786c62f6d4d39de2942604e58e4a42 100644 (file)
--- a/src/soc/experiment/test/test_loadstore1.py
+++ b/src/soc/experiment/test/test_loadstore1.py
@@ -484,6 +484,28 @@ def _test_loadstore1_ifetch_invalid(dut, mem):
     yield
     yield
 
+    print("=== test invalid loadstore instruction (instruction fault) ===")
+
+    virt_addr = 0x10200
+
+    yield ldst.priv_mode.eq(0)
+    yield ldst.instr_fault.eq(1)
+    yield ldst.maddr.eq(virt_addr)
+    #ld_data, exctype, exc = yield from pi_ld(pi, virt_addr, 8, msr_pr=1)
+    yield
+    yield ldst.instr_fault.eq(0)
+    while True:
+        done = yield (ldst.done)
+        exc_info = yield from get_exception_info(pi.exc_o)
+        if done or exc_info.happened:
+            break
+        yield
+    assert exc_info.happened == 1 # different here as expected
+    yield ldst.instr_fault.eq(0)
+    yield
+    yield
+    yield
+
     wbget.stop = True