git.libre-soc.org Git - sv2nmigen.git/summary

description	automatically converts systemverilog to nmigen
owner	git repository hosting
last change	Sat, 25 Jan 2020 14:03:20 +0000 (15:03 +0100)

2020-01-25	Tobias Platen	convert numbers to python format master	commit \| commitdiff \| tree
2020-01-25	Tobias Platen	alway_comb nested if support	commit \| commitdiff \| tree
2020-01-24	Tobias Platen	always_comb: handle if/else blocks	commit \| commitdiff \| tree
2020-01-24	Tobias Platen	convert always_comb assignments	commit \| commitdiff \| tree
2020-01-24	Tobias Platen	convert binary and unary operators	commit \| commitdiff \| tree
2020-01-24	Tobias Platen	wire assignments	commit \| commitdiff \| tree
2020-01-23	Tobias Platen	wire declarations	commit \| commitdiff \| tree
2020-01-23	Tobias Platen	remove redunant debug output	commit \| commitdiff \| tree
2020-01-23	Tobias Platen	do not create output files on error	commit \| commitdiff \| tree
2020-01-22	Tobias Platen	run autopep8	commit \| commitdiff \| tree
2019-11-03	Tobias Platen	add working preprocessor (creates docstrings)	commit \| commitdiff \| tree
2019-11-01	Tobias Platen	cleanup, add example output	commit \| commitdiff \| tree
2019-10-27	Tobias Platen	comb assignment now working	commit \| commitdiff \| tree
2019-10-26	Tobias Platen	port_decl	commit \| commitdiff \| tree
2019-10-26	Tobias Platen	add elaborate function	commit \| commitdiff \| tree
2019-10-26	Tobias Platen	class decl cleanup	commit \| commitdiff \| tree
...

4 years ago

automatically converts systemverilog to nmigen