yosys.git
2022-05-26 Jacob Lifshayadd $divfloor support to write_smt2 smtlib2-expr-support-on-0.13-old
2022-05-26 Jacob Lifshayactually test code that was broken
2022-05-26 Jacob Lifshaychange smtbmc to correctly handle output of $smtlib2_expr
2022-05-26 Jacob Lifshayadd $smtlib2_expr
2022-05-26 Aki Van Nesspass jny: flipped the defaults for the inclusion of... yosys-0.13-with-write_jny
2022-05-26 Aki Van Nesspass jny: ensured the cell collection is cleared betwee...
2022-05-26 Aki Van Nesspass jny: fixed missing quotes around the type value...
2022-05-26 Aki Van Nesspass jny: fixed the backslash escape for strings
2022-05-26 Aki Van Nesspass jny: removed the invalid json escapes
2022-05-26 Aki Van Nesspass jny: added some todo comments about things that...
2022-05-26 Aki Van Nesspass jny: changed the constructor initializers to use...
2022-05-26 Aki Van Nesspass jny: fixed the string escape method to be less...
2022-05-26 Aki Van Nesspass jny: fixed the signed output for param value output
2022-05-26 Aki Van Nesspass jny: added connection output
2022-05-26 Aki Van Nesspass jny: added filter options for including connection...
2022-05-26 Aki Van Nesspass jny: large chunk of refactoring to make the JSON...
2022-05-26 Aki Van Nessmetadata -> jny: migrated to the proper name for the...
2022-05-26 Aki Van Nesspass metadata: added the machinery to write param and...
2022-05-26 Aki Van Nesspass metadata: removed superfluous `stringf` calls
2022-05-26 Aki Van Nesspass metadata: some more rough work on dumping the...
2022-05-26 Aki Van Nesspass metadata: fixed the MetadataWriter object initiali...
2022-05-26 Aki Van Nesspass metadata: added the output of parameters,
2022-05-26 Aki Van Nesspass metadata: fixed some of the output formatting
2022-05-26 Aki Van Nesspass metadata: initial commit of the metadata pass...
2022-05-26 Marcelina Kościelnickaecp5: Do not use specify in generate in cells_sim.v.
2022-01-11 Miodrag MilanovicRelease version 0.13 yosys-0.13
2022-01-11 Miodrag MilanovicUpdate CHANGELOG
2022-01-09 github-actions... Bump version
2022-01-08 Zachary Snowsv: auto add nosync to certain always_comb local vars
2022-01-08 Zachary Snowsv: fix size cast internal expression extension
2022-01-05 github-actions... Bump version
2022-01-04 Zachary Snowlogger: fix unmatched expected warnings and errors
2022-01-04 Austin Seippopt_dff: fix sequence point copy paste bug
2022-01-04 gatecatmanual: Fix cell-stmt order
2022-01-04 github-actions... Bump version
2022-01-03 Zachary Snowfix iverilog compatibility for new case expr tests
2022-01-03 Zachary Snowfixup verilog doubleslash test
2022-01-03 Zachary Snowsv: fix size cast clipping expression width
2022-01-03 Miodrag MilanovicUpdate manual
2021-12-26 github-actions... Bump version
2021-12-25 CatherineMerge pull request #3127 from whitequark/cxxrtl-no...
2021-12-25 Catherinecxxrtl: don't reset elided wires with \init attribute.
2021-12-22 github-actions... Bump version
2021-12-21 Loftyintel_alm: disable 256x40 M10K mode
2021-12-21 github-actions... Bump version
2021-12-20 Marcelina Kościelnickamemory_share: Fix SAT-based sharing for wide ports.
2021-12-19 github-actions... Bump version
2021-12-18 Zachary Snowfix width detection of array querying function in case...
2021-12-17 github-actions... Bump version
2021-12-16 CatherineMerge pull request #3115 from whitequark/issue-3112
2021-12-16 CatherineMerge pull request #3114 from whitequark/issue-3113
2021-12-16 Thomas Sailerpreprocessor: do not destroy double slash escaped ident...
2021-12-15 Catherinecxxrtl: demote wires not inlinable only in debug_eval...
2021-12-15 Catherinebugpoint: avoid infinite loop between -connections...
2021-12-15 github-actions... Bump version
2021-12-14 CatherineMerge pull request #3111 from whitequark/issue-3110
2021-12-14 Claire Xenia... Hotfix for run_shell auto-detection
2021-12-14 CatherineFix null pointer dereference after failing to extract...
2021-12-14 github-actions... Bump version
2021-12-13 Claire XenMerge pull request #3108 from YosysHQ/claire/verificdefs
2021-12-13 Claire Xenia... Add YOSYS to the implicitly defined verilog macros...
2021-12-13 github-actions... Bump version
2021-12-12 Marcelina KościelnickaAdd clean_zerowidth pass, use it for Verilog output.
2021-12-12 CatherineMerge pull request #3105 from whitequark/cxxrtl-reset...
2021-12-12 github-actions... Bump version
2021-12-12 Marcelina KościelnickaFix unused param warning with ENABLE_NDEBUG.
2021-12-12 Marcelina Kościelnickartlil: Dump empty connections when whole module is...
2021-12-11 Catherinecxxrtl: preserve interior memory pointers across reset.
2021-12-11 CatherineMerge pull request #3103 from whitequark/write_verilog...
2021-12-11 whitequarkcxxrtl: use unique_ptr<value<>[]> to store memory contents.
2021-12-11 whitequarkwrite_verilog: dump zero width sigspecs correctly.
2021-12-11 github-actions... Bump version
2021-12-10 Miodrag MilanovićMerge pull request #3102 from YosysHQ/claire/enumxz
2021-12-10 Claire Xenia... Fix verific import of enum values with x and/or z
2021-12-10 Miodrag MilanovićMerge pull request #3097 from YosysHQ/modport
2021-12-10 Claire XenUpdate verific.cc
2021-12-10 Claire XenMerge pull request #3099 from YosysHQ/claire/readargs
2021-12-09 Claire Xenia... Fix the tests we just broke
2021-12-09 Claire Xenia... Added "yosys -r <topmodule>"
2021-12-09 Claire Xenia... Use "read" command to parse HDL files from Yosys comman...
2021-12-09 github-actions... Bump version
2021-12-08 Marcelina Kościelnickaopt_mem_priority: Fix non-ascii char in help message.
2021-12-08 Miodrag MilanovicIf direction NONE use that from first bit
2021-12-04 github-actions... Bump version
2021-12-03 Miodrag MilanovicNext dev cycle
2021-12-03 Miodrag MilanovicRelease version 0.12 yosys-0.12
2021-12-03 Miodrag MilanovicUpdate manual
2021-12-03 Miodrag MilanovicAdd gitignore for gatemate
2021-12-03 Miodrag MilanovicMake sure cell names are unique for wide operators
2021-12-02 github-actions... Bump version
2021-12-01 Miodrag MilanovicUpdate CHANGELOG and CODEOWNERS
2021-11-26 github-actions... Bump version
2021-11-25 Loftyintel_alm: preliminary Arria V support
2021-11-25 Loftysta: very crude static timing analysis pass
2021-11-18 github-actions... Bump version
2021-11-17 Miodrag MilanovićMerge pull request #3080 from YosysHQ/micko/init_wire
2021-11-17 Miodrag MilanovicGive initial wire unique ID, fixes #2914
2021-11-17 github-actions... Bump version
2021-11-16 Kamil RakoczySupport parameters using struct as a wiretype (#3050)
2021-11-14 github-actions... Bump version
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