180nm_Oct2020/ls180.mdwn

   1 # Pinouts (PinMux)
   2 auto-generated by [[pinouts.py]]
   3
   4 [[!toc  ]]
   5
   6
   7 ## Bank N (32 pins, width 2)
   8
   9 | Pin | Mux0        | Mux1        | Mux2        | Mux3        |
  10 | --- | ----------- | ----------- | ----------- | ----------- |
  11 |   6 | N VSSE_6    |             |
  12 |   7 | N VDDE_6    |             |
  13 |   8 | N VDDI_6    |             |
  14 |   9 | N VSSI_6    |             |
  15 |  22 | N VSSI_7    |             |
  16 |  23 | N VDDI_7    |             |
  17 |  24 | N VSSE_7    |             |
  18 |  25 | N VDDE_7    |             |
  19 |  27 | N SYS_RST   |             |
  20 |  28 | N SYS_PLLCLK |             |
  21 |  29 | N SYS_PLLSELA0 |             |
  22 |  30 | N SYS_PLLSELA1 |             |
  23 |  31 | N SYS_PLLTESTOUT |             |
  24
  25 ## Bank E (32 pins, width 2)
  26
  27 | Pin | Mux0        | Mux1        | Mux2        | Mux3        |
  28 | --- | ----------- | ----------- | ----------- | ----------- |
  29 |  32 | E GPIOE_E0  |             |
  30 |  33 | E GPIOE_E1  |             |
  31 |  34 | E GPIOE_E2  |             |
  32 |  35 | E GPIOE_E3  |             |
  33 |  36 | E GPIOE_E4  |             |
  34 |  37 | E GPIOE_E5  |             |
  35 |  38 | E VSSE_4    |             |
  36 |  39 | E VDDE_4    |             |
  37 |  40 | E VDDI_4    |             |
  38 |  41 | E VSSI_4    |             |
  39 |  42 | E GPIOE_E6  |             |
  40 |  43 | E GPIOE_E7  |             |
  41 |  44 | E GPIOE_E8  |             |
  42 |  45 | E JTAG_TMS  |             |
  43 |  46 | E JTAG_TDI  |             |
  44 |  47 | E JTAG_TDO  |             |
  45 |  48 | E JTAG_TCK  |             |
  46 |  49 | E GPIOE_E9  |             |
  47 |  50 | E GPIOE_E10 |             |
  48 |  51 | E GPIOE_E11 |             |
  49 |  52 | E GPIOE_E12 |             |
  50 |  53 | E GPIOE_E13 |             |
  51 |  54 | E VSSI_5    |             |
  52 |  55 | E VDDI_5    |             |
  53 |  56 | E VSSE_5    |             |
  54 |  57 | E VDDE_5    |             |
  55 |  58 | E GPIOE_E14 |             |
  56 |  59 | E GPIOE_E15 |             |
  57 |  60 | E EINT_0    |             |
  58 |  61 | E EINT_1    |             |
  59 |  62 | E EINT_2    |             |
  60 |  63 | E SYS_PLLVCOUT |             |
  61
  62 ## Bank S (32 pins, width 2)
  63
  64 | Pin | Mux0        | Mux1        | Mux2        | Mux3        |
  65 | --- | ----------- | ----------- | ----------- | ----------- |
  66 |  64 | S SDR_AD10  |             |
  67 |  65 | S SDR_AD11  |             |
  68 |  66 | S SDR_AD12  |             |
  69 |  67 | S SDR_DQM1  |             |
  70 |  68 | S VDDE_2    |             |
  71 |  69 | S VSSE_2    |             |
  72 |  70 | S VDDI_2    |             |
  73 |  71 | S VSSI_2    |             |
  74 |  72 | S SDR_D8    |             |
  75 |  73 | S SDR_D9    |             |
  76 |  74 | S SDR_D10   |             |
  77 |  75 | S SDR_D11   |             |
  78 |  76 | S SDR_D12   |             |
  79 |  77 | S SDR_D13   |             |
  80 |  78 | S SDR_D14   |             |
  81 |  79 | S SDR_D15   |             |
  82 |  80 | S SDR_CLK   |             |
  83 |  81 | S SDR_CKE   |             |
  84 |  82 | S SDR_RASn  |             |
  85 |  83 | S SDR_CASn  |             |
  86 |  84 | S SDR_WEn   |             |
  87 |  85 | S SDR_CSn0  |             |
  88 |  86 | S VSSI_3    |             |
  89 |  87 | S VDDI_3    |             |
  90 |  88 | S VSSE_3    |             |
  91 |  89 | S VDDE_3    |             |
  92 |  90 | S UART0_TX  |             |
  93 |  91 | S UART0_RX  |             |
  94 |  92 | S MSPI0_CK  |             |
  95 |  93 | S MSPI0_NSS |             |
  96 |  94 | S MSPI0_MOSI |             |
  97 |  95 | S MSPI0_MISO |             |
  98
  99 ## Bank W (32 pins, width 2)
 100
 101 | Pin | Mux0        | Mux1        | Mux2        | Mux3        |
 102 | --- | ----------- | ----------- | ----------- | ----------- |
 103 |  96 | W SDR_AD9   |             |
 104 |  97 | W SDR_AD8   |             |
 105 |  98 | W SDR_AD7   |             |
 106 |  99 | W SDR_AD6   |             |
 107 | 100 | W SDR_AD5   |             |
 108 | 101 | W SDR_AD4   |             |
 109 | 102 | W VDDE_0    |             |
 110 | 103 | W VSSE_0    |             |
 111 | 104 | W VDDI_0    |             |
 112 | 105 | W VSSI_0    |             |
 113 | 106 | W SDR_AD3   |             |
 114 | 107 | W SDR_AD2   |             |
 115 | 108 | W SDR_AD1   |             |
 116 | 109 | W SDR_AD0   |             |
 117 | 110 | W SDR_BA1   |             |
 118 | 111 | W SDR_BA0   |             |
 119 | 112 | W SDR_D7    |             |
 120 | 113 | W SDR_D6    |             |
 121 | 114 | W SDR_D5    |             |
 122 | 115 | W SDR_D4    |             |
 123 | 116 | W SDR_D3    |             |
 124 | 117 | W SDR_D2    |             |
 125 | 118 | W SDR_D1    |             |
 126 | 119 | W SDR_D0    |             |
 127 | 120 | W SDR_DQM0  |             |
 128 | 122 | W MTWI_SDA  |             |
 129 | 123 | W MTWI_SCL  |             |
 130 | 124 | W VSSI_1    |             |
 131 | 125 | W VDDI_1    |             |
 132 | 126 | W VSSE_1    |             |
 133 | 127 | W VDDE_1    |             |
 134
 135 # Pinouts (Fixed function)
 136
 137 # Functions (PinMux)
 138
 139 auto-generated by [[pinouts.py]]
 140
 141 ## EINT
 142
 143 External Interrupt
 144
 145 * EINT_0    : E28/0
 146 * EINT_1    : E29/0
 147 * EINT_2    : E30/0
 148
 149 ## GPIO
 150
 151 GPIO
 152
 153 * GPIOE_E0  : E0/0
 154 * GPIOE_E1  : E1/0
 155 * GPIOE_E10 : E18/0
 156 * GPIOE_E11 : E19/0
 157 * GPIOE_E12 : E20/0
 158 * GPIOE_E13 : E21/0
 159 * GPIOE_E14 : E26/0
 160 * GPIOE_E15 : E27/0
 161 * GPIOE_E2  : E2/0
 162 * GPIOE_E3  : E3/0
 163 * GPIOE_E4  : E4/0
 164 * GPIOE_E5  : E5/0
 165 * GPIOE_E6  : E10/0
 166 * GPIOE_E7  : E11/0
 167 * GPIOE_E8  : E12/0
 168 * GPIOE_E9  : E17/0
 169
 170 ## JTAG
 171
 172 JTAG
 173
 174 * JTAG_TCK  : E16/0
 175 * JTAG_TDI  : E14/0
 176 * JTAG_TDO  : E15/0
 177 * JTAG_TMS  : E13/0
 178
 179 ## MSPI0
 180
 181 SPI Master 1 (general)
 182
 183 * MSPI0_CK  : S28/0
 184 * MSPI0_MISO : S31/0
 185 * MSPI0_MOSI : S30/0
 186 * MSPI0_NSS : S29/0
 187
 188 ## MTWI
 189
 190 I2C Master 1
 191
 192 * MTWI_SCL  : W27/0
 193 * MTWI_SDA  : W26/0
 194
 195 ## SDR
 196
 197 SDRAM
 198
 199 * SDR_AD0   : W13/0
 200 * SDR_AD1   : W12/0
 201 * SDR_AD10  : S0/0
 202 * SDR_AD11  : S1/0
 203 * SDR_AD12  : S2/0
 204 * SDR_AD2   : W11/0
 205 * SDR_AD3   : W10/0
 206 * SDR_AD4   : W5/0
 207 * SDR_AD5   : W4/0
 208 * SDR_AD6   : W3/0
 209 * SDR_AD7   : W2/0
 210 * SDR_AD8   : W1/0
 211 * SDR_AD9   : W0/0
 212 * SDR_BA0   : W15/0
 213 * SDR_BA1   : W14/0
 214 * SDR_CASn  : S19/0
 215 * SDR_CKE   : S17/0
 216 * SDR_CLK   : S16/0
 217 * SDR_CSn0  : S21/0
 218 * SDR_D0    : W23/0
 219 * SDR_D1    : W22/0
 220 * SDR_D10   : S10/0
 221 * SDR_D11   : S11/0
 222 * SDR_D12   : S12/0
 223 * SDR_D13   : S13/0
 224 * SDR_D14   : S14/0
 225 * SDR_D15   : S15/0
 226 * SDR_D2    : W21/0
 227 * SDR_D3    : W20/0
 228 * SDR_D4    : W19/0
 229 * SDR_D5    : W18/0
 230 * SDR_D6    : W17/0
 231 * SDR_D7    : W16/0
 232 * SDR_D8    : S8/0
 233 * SDR_D9    : S9/0
 234 * SDR_DQM0  : W24/0
 235 * SDR_DQM1  : S3/0
 236 * SDR_RASn  : S18/0
 237 * SDR_WEn   : S20/0
 238
 239 ## SYS
 240
 241 System Control
 242
 243 * SYS_PLLCLK : N28/0
 244 * SYS_PLLSELA0 : N29/0
 245 * SYS_PLLSELA1 : N30/0
 246 * SYS_PLLTESTOUT : N31/0
 247 * SYS_PLLVCOUT : E31/0
 248 * SYS_RST   : N27/0
 249
 250 ## UART0
 251
 252 UART (TX/RX) 1
 253
 254 * UART0_RX  : S27/0
 255 * UART0_TX  : S26/0
 256
 257 ## VDD
 258
 259 Power
 260
 261 * VDDE_0    : W6/0
 262 * VDDE_1    : W31/0
 263 * VDDE_2    : S4/0
 264 * VDDE_3    : S25/0
 265 * VDDE_4    : E7/0
 266 * VDDE_5    : E25/0
 267 * VDDE_6    : N7/0
 268 * VDDE_7    : N25/0
 269 * VDDI_0    : W8/0
 270 * VDDI_1    : W29/0
 271 * VDDI_2    : S6/0
 272 * VDDI_3    : S23/0
 273 * VDDI_4    : E8/0
 274 * VDDI_5    : E23/0
 275 * VDDI_6    : N8/0
 276 * VDDI_7    : N23/0
 277
 278 ## VSS
 279
 280 GND
 281
 282 * VSSE_0    : W7/0
 283 * VSSE_1    : W30/0
 284 * VSSE_2    : S5/0
 285 * VSSE_3    : S24/0
 286 * VSSE_4    : E6/0
 287 * VSSE_5    : E24/0
 288 * VSSE_6    : N6/0
 289 * VSSE_7    : N24/0
 290 * VSSI_0    : W9/0
 291 * VSSI_1    : W28/0
 292 * VSSI_2    : S7/0
 293 * VSSI_3    : S22/0
 294 * VSSI_4    : E9/0
 295 * VSSI_5    : E22/0
 296 * VSSI_6    : N9/0
 297 * VSSI_7    : N22/0
 298
 299 # Pinmap for Libre-SOC 180nm
 300
 301 ## UART0
 302
 303
 304
 305 * UART0_TX 90 S26/0
 306 * UART0_RX 91 S27/0
 307
 308 ## GPIOS
 309
 310
 311 ## GPIOE
 312
 313 * GPIOE_E0 32 E0/0
 314 * GPIOE_E1 33 E1/0
 315 * GPIOE_E2 34 E2/0
 316 * GPIOE_E3 35 E3/0
 317 * GPIOE_E4 36 E4/0
 318 * GPIOE_E5 37 E5/0
 319 * GPIOE_E6 42 E10/0
 320 * GPIOE_E7 43 E11/0
 321 * GPIOE_E8 44 E12/0
 322 * GPIOE_E9 49 E17/0
 323 * GPIOE_E10 50 E18/0
 324 * GPIOE_E11 51 E19/0
 325 * GPIOE_E12 52 E20/0
 326 * GPIOE_E13 53 E21/0
 327 * GPIOE_E14 58 E26/0
 328 * GPIOE_E15 59 E27/0
 329
 330 ## JTAG
 331
 332 * JTAG_TMS 45 E13/0
 333 * JTAG_TDI 46 E14/0
 334 * JTAG_TDO 47 E15/0
 335 * JTAG_TCK 48 E16/0
 336
 337 ## PWM
 338
 339
 340 ## EINT
 341
 342 * EINT_0 60 E28/0
 343 * EINT_1 61 E29/0
 344 * EINT_2 62 E30/0
 345
 346 ## VDD
 347
 348 * VDDE_6 7 N7/0
 349 * VDDI_6 8 N8/0
 350 * VDDI_7 23 N23/0
 351 * VDDE_7 25 N25/0
 352 * VDDE_4 39 E7/0
 353 * VDDI_4 40 E8/0
 354 * VDDI_5 55 E23/0
 355 * VDDE_5 57 E25/0
 356
 357 ## VSS
 358
 359 * VSSE_6 6 N6/0
 360 * VSSI_6 9 N9/0
 361 * VSSI_7 22 N22/0
 362 * VSSE_7 24 N24/0
 363 * VSSE_4 38 E6/0
 364 * VSSI_4 41 E9/0
 365 * VSSI_5 54 E22/0
 366 * VSSE_5 56 E24/0
 367
 368 ## SYS
 369
 370
 371
 372 * SYS_RST 27 N27/0
 373 * SYS_PLLCLK 28 N28/0
 374 * SYS_PLLSELA0 29 N29/0
 375 * SYS_PLLSELA1 30 N30/0
 376 * SYS_PLLTESTOUT 31 N31/0
 377 * SYS_PLLVCOUT 63 E31/0
 378
 379 ## MTWI
 380
 381 I2C.
 382
 383
 384 * MTWI_SDA 122 W26/0
 385 * MTWI_SCL 123 W27/0
 386
 387 ## MSPI0
 388
 389 * MSPI0_CK 92 S28/0
 390 * MSPI0_NSS 93 S29/0
 391 * MSPI0_MOSI 94 S30/0
 392 * MSPI0_MISO 95 S31/0
 393
 394 ## SDR
 395
 396
 397
 398 * SDR_AD10 64 S0/0
 399 * SDR_AD11 65 S1/0
 400 * SDR_AD12 66 S2/0
 401 * SDR_DQM1 67 S3/0
 402 * SDR_D8 72 S8/0
 403 * SDR_D9 73 S9/0
 404 * SDR_D10 74 S10/0
 405 * SDR_D11 75 S11/0
 406 * SDR_D12 76 S12/0
 407 * SDR_D13 77 S13/0
 408 * SDR_D14 78 S14/0
 409 * SDR_D15 79 S15/0
 410 * SDR_CLK 80 S16/0
 411 * SDR_CKE 81 S17/0
 412 * SDR_RASn 82 S18/0
 413 * SDR_CASn 83 S19/0
 414 * SDR_WEn 84 S20/0
 415 * SDR_CSn0 85 S21/0
 416 * SDR_AD9 96 W0/0
 417 * SDR_AD8 97 W1/0
 418 * SDR_AD7 98 W2/0
 419 * SDR_AD6 99 W3/0
 420 * SDR_AD5 100 W4/0
 421 * SDR_AD4 101 W5/0
 422 * SDR_AD3 106 W10/0
 423 * SDR_AD2 107 W11/0
 424 * SDR_AD1 108 W12/0
 425 * SDR_AD0 109 W13/0
 426 * SDR_BA1 110 W14/0
 427 * SDR_BA0 111 W15/0
 428 * SDR_D7 112 W16/0
 429 * SDR_D6 113 W17/0
 430 * SDR_D5 114 W18/0
 431 * SDR_D4 115 W19/0
 432 * SDR_D3 116 W20/0
 433 * SDR_D2 117 W21/0
 434 * SDR_D1 118 W22/0
 435 * SDR_D0 119 W23/0
 436 * SDR_DQM0 120 W24/0
 437
 438 ## Unused Pinouts (spare as GPIO) for 'Libre-SOC 180nm'
 439
 440 | Pin | Mux0        | Mux1        | Mux2        | Mux3        |
 441 | --- | ----------- | ----------- | ----------- | ----------- |
 442 |  68 | S VDDE_2    |             |             |             |
 443 |  69 | S VSSE_2    |             |             |             |
 444 |  70 | S VDDI_2    |             |             |             |
 445 |  71 | S VSSI_2    |             |             |             |
 446 |  86 | S VSSI_3    |             |             |             |
 447 |  87 | S VDDI_3    |             |             |             |
 448 |  88 | S VSSE_3    |             |             |             |
 449 |  89 | S VDDE_3    |             |             |             |
 450 | 102 | W VDDE_0    |             |             |             |
 451 | 103 | W VSSE_0    |             |             |             |
 452 | 104 | W VDDI_0    |             |             |             |
 453 | 105 | W VSSI_0    |             |             |             |
 454 | 124 | W VSSI_1    |             |             |             |
 455 | 125 | W VDDI_1    |             |             |             |
 456 | 126 | W VSSE_1    |             |             |             |
 457 | 127 | W VDDE_1    |             |             |             |
 458
 459 # Reference Datasheets
 460
 461 datasheets and pinout links
 462
 463 * <http://datasheets.chipdb.org/AMD/8018x/80186/amd-80186.pdf>
 464 * <http://hands.com/~lkcl/eoma/shenzen/frida/FRD144A2701.pdf>
 465 * <http://pinouts.ru/Memory/sdcard_pinout.shtml>
 466 * p8 <http://www.onfi.org/~/media/onfi/specs/onfi_2_0_gold.pdf?la=en>
 467 * <https://www.heyrick.co.uk/blog/files/datasheets/dm9000aep.pdf>
 468 * <http://cache.freescale.com/files/microcontrollers/doc/app_note/AN4393.pdf>
 469 * <https://www.nxp.com/docs/en/data-sheet/MCF54418.pdf>
 470 * ULPI OTG PHY, ST <http://www.st.com/en/interfaces-and-transceivers/stulpi01a.html>
 471 * ULPI OTG PHY, TI TUSB1210 <http://ti.com/product/TUSB1210/>
 472
 473 # Pin Bank starting points and lengths
 474
 475 * E 32 32 2
 476 * N 0 32 2
 477 * S 64 32 2
 478 * W 96 32 2