45nm_Fall2022.mdwn

   1 Starting page
   2
   3 # Specs
   4
   5 ## Devices
   6  - 4 Core POWER CPU
   7  - SimpleV GPU
   8  - BMC
   9  - IOMMU
  10
  11 ## Interfaces
  12
  13 ### Advanced
  14
  15  - SERDES - 20 bi-directional lanes
  16    - eight for OMI(DDR4 on top of SERDES with OpenCAPI protocol)
  17    - one for ethernet
  18    - 8 for PCIE
  19  - [OpenFSI](https://openpowerfoundation.org/?resource_lib=field-replaceable-unit-fru-service-interface-fsi-openfsi-specification) instead of JTAG
  20    - [Raptor HDL](https://gitlab.raptorengineering.com/raptor-engineering-public/lpc-spi-bridge-fpga)
  21    - [Raptor Libsigrok](https://gitlab.raptorengineering.com/raptor-engineering-public/dsview/-/tree/master/libsigrokdecode4DSL/decoders/fsi)
  22  - USB - [Luna USB](https://github.com/greatscottgadgets/luna)
  23 with [USB3300 PHY](https://www.microchip.com/wwwproducts/en/USB3300#datasheet-toggle)
  24
  25 ### Basic
  26
  27 These should be easily doable with LiteX.
  28
  29 * [[shakti/m_class/UART]]
  30 * [[shakti/m_class/I2C]]
  31 * [[shakti/m_class/GPIO]]
  32 * [[shakti/m_class/SPI]]
  33 * [[shakti/m_class/QSPI]]
  34 * [[shakti/m_class/LPC]]
  35 * [[shakti/m_class/EINT]]
  36 * [[shakti/m_class/JTAG]]
  37
  38 ## Protocols
  39  - IPMT over i2c to talk to the BMC
  40    - [Intel Spec Sheet](https://www.intel.com/content/dam/www/public/us/en/documents/product-briefs/second-gen-interface-spec-v2.pdf)
  41    - [RaptorCS HDL](https://www.intel.com/content/dam/www/public/us/en/documents/product-briefs/second-gen-interface-spec-v2.pdf)