8 - Coherent Accelerator Processor Proxy (CAPP) functional unit
10 - places packets on SERDES PCIE lanes
11 - recovers clock and detects skew
18 - 4tx, 4rx for [OMI(DDR4](https://openpowerfoundation.org/wp-content/uploads/2018/10/Jeff-Steuchli.OpenCAPI-OPS-OMI.pdf) on top of SERDES with OpenCAPI protocol) @5GHz
19 - 2tx, 2rx for ethernet
20 - 4tx, 4rx for PCIE and other CAPI devices
22 - [OpenFSI](https://openpowerfoundation.org/?resource_lib=field-replaceable-unit-fru-service-interface-fsi-openfsi-specification) instead of JTAG
23 - [Raptor HDL](https://gitlab.raptorengineering.com/raptor-engineering-public/lpc-spi-bridge-fpga)
24 - [Raptor Libsigrok](https://gitlab.raptorengineering.com/raptor-engineering-public/dsview/-/tree/master/libsigrokdecode4DSL/decoders/fsi)
25 - USB - [Luna USB](https://github.com/greatscottgadgets/luna)
26 with [USB3300 PHY](https://www.microchip.com/wwwproducts/en/USB3300#datasheet-toggle) (Tested max at 333MB/s with Luna on ECP5)
30 These should be easily doable with LiteX.
32 * [[shakti/m_class/UART]]
33 * [[shakti/m_class/I2C]]
34 * [[shakti/m_class/GPIO]]
35 * [[shakti/m_class/SPI]]
36 * [[shakti/m_class/QSPI]]
37 * [[shakti/m_class/LPC]]
38 * [[shakti/m_class/EINT]]
41 - IPMT over i2c to talk to the BMC
42 - [Intel Spec Sheet](https://www.intel.com/content/dam/www/public/us/en/documents/product-briefs/second-gen-interface-spec-v2.pdf)
43 - [RaptorCS HDL](https://gitlab.raptorengineering.com/raptor-engineering-public/lpc-spi-bridge-fpga/blob/master/ipmi_bt_slave.v)
44 - Bootloader over LPC to Flexver
45 - [Whitepaper](https://www.raptorengineering.com/TALOS/documentation/flexver_intro.pdf)