6 - Also enable frame buffer slave mode to allow outputting to [BMC](https://www.aspeedtech.com/products.php?fPath=20&rId=440) for debugging
8 - Coherent Accelerator Processor Proxy (CAPP) functional unit
16 - 4tx, 4rx for [OMI(DDR4](https://openpowerfoundation.org/wp-content/uploads/2018/10/Jeff-Steuchli.OpenCAPI-OPS-OMI.pdf) on top of SERDES with OpenCAPI protocol) @5GHz
17 - 2tx, 2rx for ethernet
18 - 4tx, 4rx for PCIE and other CAPI devices
20 - [OpenFSI](https://openpowerfoundation.org/?resource_lib=field-replaceable-unit-fru-service-interface-fsi-openfsi-specification) instead of JTAG
21 - [Raptor HDL](https://gitlab.raptorengineering.com/raptor-engineering-public/lpc-spi-bridge-fpga)
22 - [Raptor Libsigrok](https://gitlab.raptorengineering.com/raptor-engineering-public/dsview/-/tree/master/libsigrokdecode4DSL/decoders/fsi)
23 - USB 2.0 - [Luna USB](https://github.com/greatscottgadgets/luna)
24 with [USB3300 PHY](https://www.microchip.com/wwwproducts/en/USB3300#datasheet-toggle) (Tested max at 333MB/s with Luna on ECP5)
28 These should be easily doable with LiteX.
30 * [[shakti/m_class/UART]]
31 * [[shakti/m_class/I2C]]
32 * [[shakti/m_class/GPIO]]
33 * [[shakti/m_class/SPI]]
34 * [[shakti/m_class/QSPI]]
35 * [[shakti/m_class/LPC]]
36 * [[shakti/m_class/EINT]]
39 - IPMT over i2c to talk to the BMC
40 - [Intel Spec Sheet](https://www.intel.com/content/dam/www/public/us/en/documents/product-briefs/second-gen-interface-spec-v2.pdf)
41 - [RaptorCS HDL](https://gitlab.raptorengineering.com/raptor-engineering-public/lpc-spi-bridge-fpga/blob/master/ipmi_bt_slave.v)
42 - Bootloader over LPC to Flexver
43 - [Whitepaper](https://www.raptorengineering.com/TALOS/documentation/flexver_intro.pdf)