Tasks 1 and 2 are in progress.
[libreriscv.git] / Cesar_Strauss.mdwn
1 # Cesar Strauss
2
3 Contributor
4
5 # Status Tracking
6
7 ## Currently working on
8
9 1. ALU CompUnit needs to recognise that RA (src1) can be zero
10 <https://bugs.libre-soc.org/show_bug.cgi?id=336>
11 Status: in progress
12
13 2. Something about the above (5), being optional.
14 <https://bugs.libre-soc.org/show_bug.cgi?id=336#c5>
15 Status: in progress
16
17 3. Code-morph LDSTCompUnit to use RecordObject structure, like CompUnitALU
18 <https://bugs.libre-soc.org/show_bug.cgi?id=318#c18>
19 Status: Need a review of Luke's implementation, compared to mine.
20
21 4. Test dual ports (two L0CacheBuffer with two ports, 4-4 as well) which
22 write to the same memory
23 <https://bugs.libre-soc.org/show_bug.cgi?id=318#c11>
24 Status: not started
25
26 5. Luke tried two LDs in the score6600 code - they failed.
27 <https://bugs.libre-soc.org/show_bug.cgi?id=318#c17>
28 Status: not started, need to check the [prototype] L0CacheBuffer
29
30 6. Fix a bug in the LDSTCompUnit
31 <https://bugs.libre-soc.org/show_bug.cgi?id=318>
32 Status: Luke thinks he fixed it, but needs a review and improving the
33 unit tests. See: <https://bugs.libre-soc.org/show_bug.cgi?id=318#c7>
34