add page use ulx3s fpga gpio pins for Libre-SOC JTAG connections to STLINKV2

[libreriscv.git] / Sanjay.mdwn

# Sanjay A Menon

* [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=sanjay%40gmail.com&emailassigned_to1=1&emailcc1=1&emailtype1=substring&resolution=---)