TLB/src/ariane/tlb.py

   1 """
   2 # Copyright 2018 ETH Zurich and University of Bologna.
   3 # Copyright and related rights are licensed under the Solderpad Hardware
   4 # License, Version 0.51 (the "License"); you may not use this file except in
   5 # compliance with the License.  You may obtain a copy of the License at
   6 # http:#solderpad.org/licenses/SHL-0.51. Unless required by applicable law
   7 # or agreed to in writing, software, hardware and materials distributed under
   8 # this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
   9 # CONDITIONS OF ANY KIND, either express or implied. See the License for the
  10 # specific language governing permissions and limitations under the License.
  11 #
  12 # Author: David Schaffenrath, TU Graz
  13 # Author: Florian Zaruba, ETH Zurich
  14 # Date: 21.4.2017
  15 # Description: Translation Lookaside Buffer, SV39
  16 #              fully set-associative
  17 """
  18 from math import log
  19
  20 # SV39 defines three levels of page tables
  21 class TLBEntry:
  22     def __init__(self):
  23         self.asid = Signal(ASID_WIDTH)
  24         self.vpn2 = Signal(9)
  25         self.vpn1 = Signal(9)
  26         self.vpn0 = Signal(9)
  27         self.is_2M = Signal()
  28         self.is_1G = Signal()
  29         self.valid = Signal()
  30
  31 TLB_ENTRIES = 4
  32 ASID_WIDTH  = 1
  33
  34 from ptw import TLBUpdate, PTE
  35
  36 class TLB:
  37     def __init__(self):
  38         self.flush_i = Signal()  # Flush signal
  39         # Update TLB
  40         self.update_i = TLBUpdate()
  41         # Lookup signals
  42         self.lu_access_i = Signal()
  43         self.lu_asid_i = Signal(ASID_WIDTH)
  44         self.lu_vaddr_i = Signal(64)
  45         self.lu_content_o = PTE()
  46         self.lu_is_2M_o = Signal()
  47         self.lu_is_1G_o = Signal()
  48         self.lu_hit_o = Signal()
  49
  50     def elaborate(self, platform):
  51         m = Module()
  52
  53         tags = TLBEntry()
  54         # SV39 defines three levels of page tables
  55
  56         content = Array([TLB() for i in range(TLB_ENTRIES)])
  57
  58         vpn2 = Signal(9)
  59         vpn1 = Signal(9)
  60         vpn0 = Signal(9)
  61         lu_hit = Signal(TLB_ENTRIES)     # to replacement logic
  62         replace_en = Signal(TLB_ENTRIES) # replace the following entry,
  63                                          # set by replacement strategy
  64         #-------------
  65         # Translation
  66         #-------------
  67         m.d.comb += [ vpn0.eq(lu_vaddr_i[12:21]),
  68                       vpn1.eq(lu_vaddr_i[21:30]),
  69                       vpn2.eq(lu_vaddr_i[30:39]),
  70                     ]
  71
  72         for i in range(TLB_ENTRIES):
  73             m.d.comb += lu_hit[i].eq(0)
  74             # first level match, this may be a giga page,
  75             # check the ASID flags as well
  76             with m.If(tags[i].valid & \
  77                       tags[i].asid == lu_asid_i &  \
  78                       tags[i].vpn2 == vpn2):
  79                 # second level
  80                 with m.If (tags[i].is_1G):
  81                     m.d.sync += lu_content_o.eq(content[i])
  82                     m.d.comb += [ lu_is_1G_o.eq(1),
  83                                   lu_hit_o.eq(1),
  84                                   lu_hit[i].eq(1),
  85                                 ]
  86                 # not a giga page hit so check further
  87                 with m.Elif(vpn1 == tags[i].vpn1):
  88                     # this could be a 2 mega page hit or a 4 kB hit
  89                     # output accordingly
  90                     with m.If(tags[i].is_2M | vpn0 == tags[i].vpn0):
  91                         m.d.sync += lu_content_o.eq(content[i])
  92                         m.d.comb += [ lu_is_2M_o.eq(tags[i].is_2M),
  93                                       lu_hit_o.eq(1),
  94                                       lu_hit[i].eq(1),
  95                                     ]
  96
  97         # ------------------
  98         # Update and Flush
  99         # ------------------
 100
 101         for i in range(TLB_ENTRIES):
 102             with m.If (flush_i):
 103                 # invalidate (flush) conditions: all if zero or just this ASID
 104                 with m.If (lu_asid_i == Const(0, ASID_WIDTH) |
 105                           (lu_asid_i == tags[i].asid)):
 106                     m.d.sync += tags[i].valid.eq(0)
 107
 108             # normal replacement
 109             with m.Elif(update_i.valid & replace_en[i]):
 110                 m.d.sync += [ # update tag array
 111                               tags[i].asid.eq(update_i.asid),
 112                               tags[i].vpn2.eq(update_i.vpn [18:27]),
 113                               tags[i].vpn1.eq(update_i.vpn [9:18]),
 114                               tags[i].vpn0.eq(update_i.vpn[0:9]),
 115                               tags[i].is_1G.eq(update_i.is_1G),
 116                               tags[i].is_2M.eq(update_i.is_2M),
 117                               tags[i].valid.eq(1),
 118                               # and content as well
 119                               content[i].eq(update_i.content)
 120                             ]
 121
 122         # -----------------------------------------------
 123         # PLRU - Pseudo Least Recently Used Replacement
 124         # -----------------------------------------------
 125
 126         TLBSZ = 2*(TLB_ENTRIES-1)
 127         plru_tree = Signal(TLBSZ)
 128
 129         # The PLRU-tree indexing:
 130         # lvl0        0
 131         #            / \
 132         #           /   \
 133         # lvl1     1     2
 134         #         / \   / \
 135         # lvl2   3   4 5   6
 136         #       / \ /\/\  /\
 137         #      ... ... ... ...
 138         # Just predefine which nodes will be set/cleared
 139         # E.g. for a TLB with 8 entries, the for-loop is semantically
 140         # equivalent to the following pseudo-code:
 141         # unique case (1'b1)
 142         # lu_hit[7]: plru_tree[0, 2, 6] = {1, 1, 1};
 143         # lu_hit[6]: plru_tree[0, 2, 6] = {1, 1, 0};
 144         # lu_hit[5]: plru_tree[0, 2, 5] = {1, 0, 1};
 145         # lu_hit[4]: plru_tree[0, 2, 5] = {1, 0, 0};
 146         # lu_hit[3]: plru_tree[0, 1, 4] = {0, 1, 1};
 147         # lu_hit[2]: plru_tree[0, 1, 4] = {0, 1, 0};
 148         # lu_hit[1]: plru_tree[0, 1, 3] = {0, 0, 1};
 149         # lu_hit[0]: plru_tree[0, 1, 3] = {0, 0, 0};
 150         # default: begin /* No hit */ end
 151         # endcase
 152         LOG_TLB = int(log2(TLB_ENTRIES))
 153         for i in range(TLB_ENTRIES):
 154             # we got a hit so update the pointer as it was least recently used
 155             with m.If (lu_hit[i] & lu_access_i):
 156                 # Set the nodes to the values we would expect
 157                 for lvl in range(LOG_TLB):
 158                     idx_base = (1<<lvl)-1
 159                     # lvl0 <=> MSB, lvl1 <=> MSB-1, ...
 160                     shift = LOG_TLB - lvl;
 161                     new_idx = Const(~((i >> (shift-1)) & 1))
 162                     m.d.sync += plru_tree[idx_base + (i >> shift)].eq(new_idx)
 163
 164         # Decode tree to write enable signals
 165         # Next for-loop basically creates the following logic for e.g.
 166         # an 8 entry TLB (note: pseudo-code obviously):
 167         # replace_en[7] = &plru_tree[ 6, 2, 0]; #plru_tree[0,2,6]=={1,1,1}
 168         # replace_en[6] = &plru_tree[~6, 2, 0]; #plru_tree[0,2,6]=={1,1,0}
 169         # replace_en[5] = &plru_tree[ 5,~2, 0]; #plru_tree[0,2,5]=={1,0,1}
 170         # replace_en[4] = &plru_tree[~5,~2, 0]; #plru_tree[0,2,5]=={1,0,0}
 171         # replace_en[3] = &plru_tree[ 4, 1,~0]; #plru_tree[0,1,4]=={0,1,1}
 172         # replace_en[2] = &plru_tree[~4, 1,~0]; #plru_tree[0,1,4]=={0,1,0}
 173         # replace_en[1] = &plru_tree[ 3,~1,~0]; #plru_tree[0,1,3]=={0,0,1}
 174         # replace_en[0] = &plru_tree[~3,~1,~0]; #plru_tree[0,1,3]=={0,0,0}
 175         # For each entry traverse the tree. If every tree-node matches
 176         # the corresponding bit of the entry's index, this is
 177         # the next entry to replace.
 178         for i in range(TLB_ENTRIES):
 179             en = [Const(1)]
 180             for lvl in range(LOG_TLB):
 181                 idx_base = (1<<lvl)-1
 182                 # lvl0 <=> MSB, lvl1 <=> MSB-1, ...
 183                 shift = LOG_TLB - lvl;
 184                 new_idx = (i >> (shift-1)) & 1;
 185                 plru = plru_tree[idx_base + (i>>shift)]
 186                 # en &= plru_tree_q[idx_base + (i>>shift)] == new_idx;
 187                 if new_idx:
 188                     en.append(~plru) # yes inverted (using bool())
 189                 else:
 190                     en.append(plru)  # yes inverted (using bool())
 191             # boolean logic manipluation:
 192             # plur0 & plru1 & plur2 == ~(~plru0 | ~plru1 | ~plru2)
 193             m.d.sync += replace_en[i].eq(~Cat(*en).bool())
 194
 195         #--------------
 196         # Sanity checks
 197         #--------------
 198
 199         assert (TLB_ENTRIES % 2 == 0) and (TLB_ENTRIES > 1), \
 200             "TLB size must be a multiple of 2 and greater than 1"
 201         assert (ASID_WIDTH >= 1), \
 202             "ASID width must be at least 1"
 203
 204         """
 205         # Just for checking
 206         function int countSetBits(logic[TLB_ENTRIES-1:0] vector);
 207           automatic int count = 0;
 208           foreach (vector[idx]) begin
 209             count += vector[idx];
 210           end
 211           return count;
 212         endfunction
 213
 214         assert property (@(posedge clk_i)(countSetBits(lu_hit) <= 1))
 215           else $error("More then one hit in TLB!"); $stop(); end
 216         assert property (@(posedge clk_i)(countSetBits(replace_en) <= 1))
 217           else $error("More then one TLB entry selected for next replace!");
 218         """
 219