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[libreriscv.git] / The_Mission.mdwn
1 > We believe a computer should be safe to use, and this starts with a safe processor.
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3 # The Mission
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5 - give mass volume appliance manufacturers an alternative to expensive un-auditable chips.
6 - maximize the degree of trust a customer can place in their processor.
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8 # The Means:
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10 - provide the customer the **freedom to study, modify, and redistribute** the full SoC source from HDL and boot loader to down to the VLSI.
11 - engage in **full transparency** at every level of the development, right from the inception through to delivery of silicon. no exceptions.
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13 # The Market:
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15 - chromebooks
16 - smartphones
17 - tablets
18 - industrial boards
19 - single-board computers (like the Raspberry Pi)
20 - wearables
21 - CV capable flight controller for lightweight drones
22 - whatever you want
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24 # The Machine:
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26 - our first target (Oct 2020): a single-core dual-issue 180nm 64-bit "demo" QFP chip that will also be a saleable product in the "Embedded" space (Arduino, STM32F, Ingenic jz4720).
27 - a full quad core SoC: 800mhz, dual issue, 4-wide FP32, Hybrid CPU / GPU / VPU [and later an ML inference core], comparable to the Allwinner 64 in capability.