add rogier brussee's parallelism extension which uses bitmaps
[libreriscv.git] / bitmap_parallelism_extension.mdwn
1 # Parallelism using Bitmaps
2
3 If you think about it this way you can combine setvl, and predication,
4 and indeed vector length, by always working with bitmaps.
5
6 So: you have 32 WARL CSRs , called X0, ... X31 (or perhaps 2 banks of
7 32 CSR's and have a set of additional CSR's FX0,... FX31)
8
9 Each contains a bitmap of length 32 (assuming we only have the standard
10 registers)
11
12 By default, X0 contains 1<<0, X1 contains 1<<1, X2 contains 1 << 2, ...
13
14 now an instruction like
15
16 add x1 x2 x3
17
18 is reinterpreted as referring to the CSR's rather than individual
19 registers. i.e. under simple V it means
20
21 add X1, X2, X3
22
23 and it has the following semantics:
24
25 let rds = registers in bitmap X1
26 let rs1s = registers in bitmap X2 repeated periodically in order of register number to the length of X1
27 let rs2s = registers in bitmap X3 repeated periodically in order of register number to the length of X1
28
29
30 parallelfor (rd, rs1, rs2) in (rds[i],rs1s[i], rs2s[i]) where i = 0 to length(rds) - 1
31 add rd rs1 rs2
32
33
34 example:
35
36 X1 <- 0b011111
37 X2 <- 0b1011
38 X3 <- 0b00010
39
40 then
41 rd1s = [x1, x2, x3, x4, x5]
42 rs1s = [x0, x2, x3, x0, x2]
43 rs2s = [x3, x3, x3, x3, x3]
44
45 and
46
47 add X1, X2, X3
48
49 is interpreted as
50
51 parallel{
52 add x1, x0, x3
53 add x2, x2, x3
54 add x3, x3, x3
55 add x4, x0, x3 # x2 and x3 have their original values!
56 add x5, x2, x3 # x2 and x3 have their original values!
57 }
58
59 This means that the analogue of setvl is simply the "write any" of
60 setting the bitmap, and the analogue of the return value of setvl,
61 is the "read legal" of the CSR. Moreover popc would tell you how many
62 operations are scheduled in parallel so you know how often you have to
63 repeat a sequential loop.
64