conferences/fosdem2024/fosdem2024_ddffirst/fosdem2024_ddffirst.tex

   1 \documentclass[slidestop]{beamer}
   2 \usepackage{beamerthemesplit}
   3 \usepackage{graphics}
   4 \usepackage{pstricks}
   5
   6 \graphicspath{{./}}
   7
   8 \title{Data-Dependent-Fail-First}
   9 \author{Luke Kenneth Casson Leighton and Shriya Sharma}
  10
  11
  12 \begin{document}
  13
  14 \frame{
  15    \begin{center}
  16     \huge{The Libre-SOC Hybrid 3D CPU}\\
  17     \vspace{32pt}
  18     \Large{Data-Dependent-Fail-First}\\
  19
  20     \vspace{24pt}
  21     \Large{FOSDEM2024}\\
  22     \vspace{16pt}
  23     \large{Sponsored by NLnet's PET Programme}\\
  24     \vspace{6pt}
  25     \large{\today}
  26   \end{center}
  27 }
  28
  29
  30 \frame{\frametitle{Why another SoC?}
  31
  32  \begin{itemize}
  33    \item Intel Management Engine, Apple QA issues, Spectre\vspace{6pt}
  34    \item Endless proprietary drivers, "simplest" solution: \\
  35          License proprietary hard macros (with proprietary firmware)\\
  36                  Adversely affects product development cost\\
  37                 due to opaque driver bugs (Samsung S3C6410 / S5P100)
  38                  \vspace{6pt}
  39    \item Alternative: Intel and Valve-Steam collaboration\\
  40          "Most productive business meeting ever!"\\
  41          https://tinyurl.com/valve-steam-intel
  42                 \vspace{6pt}
  43    \item Because for 30 years I Always Wanted To Design A CPU
  44                 \vspace{6pt}
  45    \item Ultimately it is a strategic \textit{business} objective to
  46          develop entirely Libre hardware, firmware and drivers.
  47   \end{itemize}
  48 }
  49
  50
  51
  52 \frame{\frametitle{How can you help?}
  53
  54 \vspace{5pt}
  55
  56  \begin{itemize}
  57    \item Start here! https://libre-soc.org \\
  58              Mailing lists https://lists.libre-soc.org \\
  59              IRC Freenode libre-soc \\
  60              etc. etc. (it's a Libre project, go figure) \\
  61                    \vspace{3pt}
  62    \item Can I get paid? Yes!  NLnet funded\\
  63                  See https://libre-soc.org/nlnet/\#faq \\
  64                  \vspace{3pt}
  65    \item Also profit-sharing in any commercial ventures \\
  66              \vspace{3pt}
  67    \item How many opportunities to develop Libre SoCs exist,\\
  68              and actually get paid for it?
  69                      \vspace{3pt}
  70    \item I'm not a developer, how can I help?\\
  71                 - Plenty of research needed, artwork, website \\
  72                 - Help find customers and OEMs willing to commit (LOI)
  73   \end{itemize}
  74 }
  75
  76
  77
  78 \frame{\frametitle{What goes into a typical SoC?}
  79 \vspace{9pt}
  80  \begin{itemize}
  81    \item 15 to 20mm BGA package: 2.5 to 5 watt power consumption\\
  82                 heat sink normally not required (simplifies overall design)
  83                 \vspace{3pt}
  84    \item Fully-integrated peripherals (not Northbridge/Southbridge)\\
  85          USB, HDMI, RGB/TTL, SD/MMC, I2C, UART, SPI, GPIO etc. etc.
  86          \vspace{3pt}
  87    \item Built-in GPU (shared memory bus, 3rd party licensed) \vspace{3pt}
  88    \item Built-in VPU (likewise, proprietary)\vspace{3pt}
  89    \item Target price between \$2.50 and \$30 depending on market\\
  90          Radically different from IBM POWER9 Core (200 Watt)
  91          \vspace{3pt}
  92    \item We're doing the same, just with a hybrid architecture.\\
  93                  CPU == GPU == VPU
  94   \end{itemize}
  95 }
  96
  97
  98
  99 %%\frame{\frametitle{Simple SBC-style SoC}
 100 %%
 101 %%\begin{center}
 102 %%\includegraphics[width=0.9\textwidth]{shakti_libre_soc.jpg}
 103 %%\end{center}
 104
 105 %%}
 106
 107
 108
 109
 110 \begin{frame}[fragile]
 111 \frametitle{Simple-V ADD in a nutshell}
 112
 113 \begin{semiverbatim}
 114 function op\_add(rd, rs1, rs2, predr) # add not VADD!
 115   int i, id=0, irs1=0, irs2=0;
 116   for (i = 0; i < VL; i++)
 117     if (ireg[predr] & 1<<i) # predication uses intregs
 118        ireg[rd+id] <= ireg[rs1+irs1] + ireg[rs2+irs2];
 119     if (reg\_is\_vectorised[rd] )  \{ id += 1; \}
 120     if (reg\_is\_vectorised[rs1])  \{ irs1 += 1; \}
 121     if (reg\_is\_vectorised[rs2])  \{ irs2 += 1; \}
 122 \end{semiverbatim}
 123
 124   \begin{itemize}
 125    \item Above is oversimplified: Reg. indirection left out (for clarity).
 126    \item SIMD slightly more complex (case above is elwidth = default)
 127    \item Scalar-scalar and scalar-vector and vector-vector now all in one
 128    \item OoO may choose to push ADDs into instr. queue (v. busy!)
 129   \end{itemize}
 130 \end{frame}
 131
 132 \frame{\frametitle{Additional Simple-V features}
 133
 134  \begin{itemize}
 135    \item "fail-on-first" (POWER9 VSX strncpy segfaults on boundary!)
 136    \item "Twin Predication" (covers VSPLAT, VGATHER, VSCATTER, VINDEX etc.)
 137    \item SVP64: extensive "tag" (Vector context) augmentation
 138    \item "Context propagation": a VLIW-like context.  Allows contexts
 139          to be repeatedly applied.
 140           Effectively a "hardware compression algorithm" for ISAs.
 141    \item Ultimate goal: cut down I-Cache usage, cuts down on power
 142    \item Typical GPU has its own I-Cache and small shaders.\\
 143         \textit{We are a Hybrid CPU/GPU: I-Cache is not separate!}
 144    \item Needs to go through OpenPOWER Foundation `approval'
 145   \end{itemize}
 146 }
 147
 148 \frame{\frametitle{maxloc}
 149   \begin{itemize}
 150                 \item "TODO
 151   \end{itemize}
 152 }
 153 \frame{\frametitle{Pospopcount}
 154   \begin{itemize}
 155         \item "TODO
 156   \end{itemize}
 157 }
 158 \frame{\frametitle{strncpy}
 159   \begin{itemize}
 160         \item "TODO
 161  \end{itemize}
 162 }
 163 \frame{\frametitle{linked-list walking}
 164   \begin{itemize}
 165         \item "TODO
 166  \end{itemize}
 167 }
 168 \frame{\frametitle{Summary}
 169
 170  \begin{itemize}
 171    \item Goal is to create a mass-volume low-power embedded SoC suitable
 172          for use in netbooks, chromebooks, tablets, smartphones, IoT SBCs.
 173    \item No way we could implement a project of this magnitude without
 174          nmigen (being able to use python OO to  HDL)
 175    \item Collaboration with OpenPOWER Foundation and Members absolutely
 176          essential. No short-cuts.  Standards to be developed and ratified
 177          so that everyone benefits.
 178    \item Riding the wave of huge stability of OpenPOWER ecosystem
 179    \item Greatly simplified open 3D and Video drivers reduces product
 180          development costs for customers
 181    \item It also happens to be fascinating, deeply rewarding technically
 182          challenging, and funded by NLnet
 183
 184   \end{itemize}
 185 }
 186
 187
 188 \frame{
 189   \begin{center}
 190     {\Huge The end\vspace{12pt}\\
 191                    Thank you\vspace{12pt}\\
 192                    Questions?\vspace{12pt}
 193         }
 194   \end{center}
 195
 196   \begin{itemize}
 197         \item Discussion: http://lists.libre-soc.org
 198         \item Freenode IRC \#libre-soc
 199         \item http://libre-soc.org/
 200         \item http://nlnet.nl/PET
 201         \item https://libre-soc.org/nlnet/\#faq
 202   \end{itemize}
 203 }
 204
 205
 206 \end{document}