bug 1048, ls011: Add Fixed Load Shifted Post-Update section
[libreriscv.git] / conferences / ics2022.mdwn
1 # ICS2022
2
3 27 June 2022
4
5 * <https://ics2022.github.io/>
6 * <https://meep-project.eu/form/workshop-on-risc-v-and-openpower>
7 * <https://meep-project.eu/events/3rd-workshop-risc-v-and-openpower-hpc>
8 * <https://libre-soc.org/openpower/sv/SimpleV_rationale/>
9
10 # Luke Leighton bio
11
12 Luke Kenneth Casson Leighton specialises in Libre Ethical Technology.
13 He has been using, programming and reverse-engineering computing
14 devices continuously for 44 years, has a BEng (Hons), ACGI, in
15 Theory of Computing from Imperial College, and recently put that
16 education to good use in the form of the Libre-SOC
17 Project: an entirely Libre-Licensed 3D Hybrid CPU-VPU-GPU based on
18 OpenPOWER. He writes poetry and has been developing a HEP Physics theory
19 for the past 36 years in his spare time.
20
21 # Coherent Distributed Computing: ZOLC, SVP64, OpenCAPI
22
23 Deterministic Scheduled Zero-Overhead Loops have a startling property:
24 their deterministic nature allows them to be distributed. Extra-V began
25 to illustrate the potential here, by performing near-Memory Coherent
26 and conditional Graph walking, making full use of OpenCAPI's potential.
27 Snitch also led the way, bringing back Auto-increment Load/Store from
28 the CISC era, but hidden behind Tagged Registers connected to
29 Coherent FIFOs leading indirectly to main Memory. Where both Snitch
30 and Extra-V used limited variants of Deterministic Loops as
31 proof-of-concept to support their overall research, with only rudimentary
32 processing capability,
33 ZOLC is a much more deeply extensive and well-defined Deterministic Loop
34 Control system that can fit directly on top of a standard ISA.
35
36 SVP64 takes the Zero-Overhead Loop concept firmly into Supercomputing
37 Vector Processing territory, currently limited to the register file.
38 This talk explores the potential of combining Snitch and Extra-V's
39 pioneering techniques, combining SVP64 and ZOLC, and leveraging OpenCAPI,
40 on top of the OpenPOWER ISA, to create High-performance Coherent
41 Distributed Computing with the potential to run large-scale Parallel
42 Compute tasks at 100% sustained throughput whilst also bringing the potential
43 of Snitch's 85% power-consumption-reduction to bear, using assembly intrinsics at
44 in a normal everyday ubiquitous Software environment: no specialist
45 parallel programming languages or special compilers needed.
46