sync_up: Discussion page for tomorrow's meeting
[libreriscv.git] / conferences / iit_roorkee_2021.mdwn
1 # IIT Rourkee 2021
2
3 ## Abstract
4
5 The Libre-SOC Project aims to create an entirely Libre-Licensed,
6 transparently-developed fully auditable Hybrid 3D CPU-GPU-VPU,
7 using the Supercomputer-class OpenPOWER ISA as the foundation.
8
9 Our first test ASIC is a 180nm "Fixed-Point" Power ISA v3.0B
10 processor, 5.1mm x 5.9mm, as a proof-of-concept for the team,
11 whose primary expertise is in Software Engineering. Software
12 Engineering training brings a radically different approach to
13 Hardware development: extensive unit tests, source code revision
14 control, automated development tools are normal. Libre Project
15 Management brings even more: bugtrackers, mailing lists, auditable
16 IRC logs and a wiki are standard fare for Libre Projects that are
17 simply not normal Industry-Standard practice.
18
19 This talk therefore goes through the workflow, from the original
20 HDL through to the GDS-II layout, showing how we were able to keep
21 track of the development that led to the IMEC 180nm tape-out in
22 July 2021. In particular, by following a parallel development
23 process involving "Real" and "Symbolic" Cell Libraries, developed
24 by Chips4Makers, will be shown how our developers did not need to
25 sign a Foundry NDA, but were still able to work side-by-side with
26 a University that did. With this parallel development process,
27 the University upheld their NDA obligations, and Libre-SOC were
28 simultaneously able to honour its Transparency Objectives.
29
30 # Links
31
32 * IIT Roorkee, 2021 July 16th.
33 * <https://www.iitr.ac.in/>