crypto_router_asic/crypto_router_pinspec.mdwn

   1 # NGI POINTER Gigabit Ethernet Router Pinmux
   2
   3 * NLnet page: [[/nlnet_2021_crypto_router]]
   4 * bugreport: <https://bugs.libre-soc.org/show_bug.cgi?id=739>
   5 * Top-level bugreport: <https://bugs.libre-soc.org/show_bug.cgi?id=589>
   6 * ls180 packaging: <https://bugs.libre-soc.org/show_bug.cgi?id=508>
   7 * Main page: [[/crypto_router_asic]]
   8 * Package Selection page: <https://www.greatek.com.tw/product6-en.html>
   9 * Source code: <https://git.libre-soc.org/?p=pinmux.git;a=blob;f=src/spec/ngi_router.py;hb=HEAD>
  10 * Pinout (based on LS180): [[/crypto_router_asic/ngi_router]]
  11
  12 # Expected Package
  13
  14 * QFP 256 pin?
  15 * Largest option from Greatek: LQFP-256-0.4mm
  16   - LQFP
  17   - 28x28mm size
  18   - 256 pins
  19   - 0.4mm pitch
  20   - 1.0mm lead length
  21   - body height 1.4mm
  22
  23 # Functionality and Pincount (NOT FINAL, LIKELY TO CHANGE):
  24
  25 Essential:
  26
  27 * 5x RGMII Ethernet - 5x18 = 90 pins [[shakti/m_class/RGMII/]]
  28 * 2x USB ULPI - 2x12 = 24 pins [[shakti/m_class/ULPI/]]
  29 * SDRAM - 39 pins [[shakti/m_class/sdram/]]
  30 * UART - 2 pins
  31 * JTAG - 4 pins [[shakti/m_class/JTAG/]]
  32 * 1.8v Core Power Vdd - 13 pins
  33 * 1.8v Core Power Vss - 13 pins
  34 * 3.3v IO Power Vdd - 10 pins
  35 * 3.3v IO Power Vss - 10 pins
  36 * Reset - 1 pin
  37 * PLL - 5 pins
  38 * SPI - 4 pins [[shakti/m_class/SPI/]]
  39
  40 non-essential:
  41
  42 * GPIO - 16 pins
  43 * EINT - 3 pins
  44 * I2C - 2 pins
  45 * QSPI - Could share with SPI - 6 pins [[shakti/m_class/QSPI/]]
  46 * SD/MMC - Could share with SPI - 4 pins
  47
  48 Total: **246** pins (10 spare)
  49
  50 GPIO, EINT, Vdd, Vss, SDRAM, reset, PLL pin counts come from the LS180 pinmux definitions.
  51
  52 RGMII pinout count comes from [here](https://web.pa.msu.edu/hep/atlas/l1calo/hub/hardware/components/micrel/rgmii_specification_hp_v1.3_dec_2000.pdf)
  53
  54 # SVG image
  55
  56 [[!img ngi_router.svg size=640x ]]