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1 # Welcome to Libre-SoC ([provisionally renamed](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-January/003580.html) from Libre-RISCV)!
2
3 The Libre-SoC project is an effort to develop a complete modern capability
4 SoC (quad core, 800mhz, dual issue,
5 GPU, VPU, [and later an ML inference core] ) that is libre to the bedrock.
6
7 Libre has a very specific meaning and guarantees, where "open" does not.
8 See <https://www.gnu.org/philosophy/open-source-misses-the-point.html>
9 for an explanation of the distinction, and for additional examples:
10 <https://wiki.opensourceecology.org/wiki/Fake_Open_Source>
11
12 This is a publicly editable wiki.
13
14 All wikis are supposed to have a [[SandBox]], so this one does too.
15
16 This wiki is powered by [[ikiwiki]].
17
18 This is the sitemap: [[sitemap]]
19
20 ----
21
22 # Why a Libre SOC?
23 Glad you asked! Read about the business and practical benefits of a LibreSOC below.
24
25 [[why_a_libresoc]]
26
27 # Contact
28
29 The main contact point is the
30 [mailing list](http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev).
31 If you need to contact the sysadmin please use webmaster@libre-riscv.org
32
33 # Joining/Onboarding Process
34
35 This process probably needs some improvement: the basic
36 idea is to join the
37 [mailing list](http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev),
38 introduce yourself, and read through
39 [recent posts](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/)
40 and the [[charter]].
41
42 The next thing you should do is read through the [bugs
43 list](http://bugs.libre-riscv.org) and see if there are any bugs that
44 pique your interest.
45
46 We do have funding available (see [[nlnet]]) upon completion of issues -
47 we are also working on procuring more funding which gets the project to
48 nanometre scale tapeout.
49
50 After all this, if you feel that Libre-SoC is a good cause that
51 you would like to contribute to, add yourself to the [[current_members]]
52 page, fill in some information about yourself, and join the mailing list
53 and say hello.
54
55 ## Needed Skills
56
57 Most labor is currently being applied to developing the GPU portion of
58 the Libre-SoC.
59
60 The highest priority needed at the moment is a c++ engineer to work on
61 a MESA 3D driver. This will begin life similar to SwiftShader however
62 retaining the vectorisation and predication intrinsics as well as hardware accelerated opcodes (all of which SwiftShader lacks)
63
64 Medium to long-term we need HDL engineers. Particularly those familiar
65 with nMigen or just python. Most of the techniques being used require
66 software engineering skills (OO design, polymorphism) than they do more
67 traditional HDL programming skills. Basically if you have experience in 2
68 of the following you'll do fine: python, nmigen, verilog/VHDL/gate-level
69 design. See [[HDL_workflow]]
70
71 Also, individuals with experience in formal mathematical verification
72 are quite welcome.
73
74 TODO: add a list of upcoming project tasks/milestones (link to
75 bugtracker).
76
77 # Resources
78
79 * Mailing Lists <http://lists.libre-riscv.org> -
80 Archives at <http://lists.libre-riscv.org/pipermail>
81 * Git repositories <http://git.libre-riscv.org>
82 may be cloned publicly with
83 git clone https://git.libre-riscv.org/git/repositoryname.git
84 * Bugzilla at <http://bugs.libre-riscv.org/>
85 * Kazan (Vulkan driver) at <https://salsa.debian.org/Kazan-team/kazan>
86 * Further Information [[resources]]
87
88 # Main Pages
89
90 * Libre-SoC [[charter]]
91 * [[shakti/m_class]]
92 * [[alt_rvp]]
93 * [[3d_gpu]]
94 * [[vpu]]
95 * [[simple_v_extension]]
96 * [[zfpacc_proposal]]
97 * [[ztrans_proposal]]
98 * [[simple_v_extension/specification/mv.x]]
99 * [[simple_v_extension/specification/ld.x]]
100 * Specifications and [[resources]]
101
102 # Spike Emulator
103 * [Set-Up Instructions][1]
104
105 [1]: https://libre-riscv.org/3d_gpu/spike_sv/
106
107 # Current Members
108
109 [[current_members]]