lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
   8 * <http://twitter.com/lkcl>
   9
  10 # Priority tasks to keep an eye on
  11
  12 * <https://bugs.libre-soc.org/show_bug.cgi?id=899> transcendentals sim EUR 4000
  13 * <https://bugs.libre-soc.org/show_bug.cgi?id=252> 3D simulator EUR 7000
  14 * <https://bugs.libre-soc.org/show_bug.cgi?id=198> nmutil/etc Formal Proofs
  15    EUR 8650
  16 * <https://bugs.libre-soc.org/show_bug.cgi?id=236> Atomics, Jacob
  17   EUR 2500
  18 * <https://bugs.libre-soc.org/show_bug.cgi?id=728> ISACaller, Dmitry
  19   EUR 1000
  20 * <https://bugs.libre-soc.org/show_bug.cgi?id=871> Pack/Unpack
  21   EUR 700
  22 * <https://bugs.libre-soc.org/show_bug.cgi?id=197> 6600 proof
  23   EUR 5000
  24
  25
  26 # Status tracking
  27
  28 move things along from one stage to the next
  29
  30 ## Currently working on
  31
  32  - Project Management
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=594> PartitionedSignal RFC
  34    - EUR 1500
  35  - <https://bugs.libre-soc.org/show_bug.cgi?id=665> nmigen c compiler
  36  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISANS letter
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=240> ISA switch
  38  - <https://bugs.libre-soc.org/show_bug.cgi?id=238> Compressed writeup
  39  - <https://bugs.libre-soc.org/show_bug.cgi?id=858> SVP64 Primer
  40  - <https://bugs.libre-soc.org/show_bug.cgi?id=867> svindex
  41  - <https://bugs.libre-soc.org/show_bug.cgi?id=834> binutils draft instructions
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=533> cr int draft instructions
  43  - <https://bugs.libre-soc.org/show_bug.cgi?id=251> 3D MESA
  44  - <https://bugs.libre-soc.org/show_bug.cgi?id=844> binutils magic
  45  - <https://bugs.libre-soc.org/show_bug.cgi?id=839> SVP64 whitepaper
  46  - <https://bugs.libre-soc.org/show_bug.cgi?id=243> Documentation SVP64 Proposals
  47  - <https://bugs.libre-soc.org/show_bug.cgi?id=834> management, binutils
  48  - <https://bugs.libre-soc.org/show_bug.cgi?id=463> donated, Simulator
  49  - <https://bugs.libre-soc.org/show_bug.cgi?id=237> SV Encoding
  50  - <https://bugs.libre-soc.org/show_bug.cgi?id=790> nextpnr-xilinx
  51    - EUR 150
  52  - <https://bugs.libre-soc.org/show_bug.cgi?id=802> ls2 documentation
  53    - EUR 150
  54  - <https://bugs.libre-soc.org/show_bug.cgi?id=664> SVP64 Branches
  55    - EUR 1000
  56  - <https://bugs.libre-soc.org/show_bug.cgi?id=176> Partitioned Logic
  57  - <https://bugs.libre-soc.org/show_bug.cgi?id=167> Partitioned Mux
  58    - EUR 250
  59  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> Partitioned Type 2 DSL
  60    - EUR 1000 of 1250 shared
  61  - <https://bugs.libre-soc.org/show_bug.cgi?id=549> Partitioned Logic docs
  62  - <https://bugs.libre-soc.org/show_bug.cgi?id=684> XLEN-16 fails
  63  - <https://bugs.libre-soc.org/show_bug.cgi?id=701> DCT FFT documentation
  64  - <https://bugs.libre-soc.org/show_bug.cgi?id=658> SVSTATE extended to 64 bit
  65  - <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
  66  - <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
  67  - <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
  68  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  69  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  70  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  71  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  72  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  73  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  74    - EUR
  75  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  76  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  77  - <https://bugs.libre-soc.org/show_bug.cgi?id=450> Create HDL MMU
  78  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  79  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  80  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  81  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  82    - shared with cole
  83  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  84    - EUR 50, shared with samuel 10%
  85  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  86
  87  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  88  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  89    - EUR 50, shared with samuel (EUR 350)
  90  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  91  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  92  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  93  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  94  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  95    - EUR 200
  96  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  97  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  98    - donated
  99    - parent #198
 100    - EUR 200
 101  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
 102   - MultiCompUnit (and Function Units) proof
 103  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
 104   - donated
 105   - parent #195
 106  - <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
 107
 108 ## Completed but not yet submitted:
 109
 110 TO SORT
 111
 112 28feb2022
 113
 114  - <https://bugs.libre-soc.org/show_bug.cgi?id=485> icache
 115    * EUR 1500 (shared with [[tplaten]])
 116  - <https://bugs.libre-soc.org/show_bug.cgi?id=469> dcache
 117    * EUR 1500 (shared with [[tplaten]])
 118  - <https://bugs.libre-soc.org/show_bug.cgi?id=491> mmu
 119    * EUR 1000 (shared with [[tplaten]])
 120  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL Formal (donated)
 121    * EUR 500 (shared with [[programmerjake]])
 122  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
 123    * EUR 400 (shared with [[programmerjake]])
 124
 125 before that
 126
 127  - <https://bugs.libre-soc.org/show_bug.cgi?id=686> create Power ISA test API
 128    - EUR 1600
 129    - EUR 800 shared with [[klehman]]
 130    - EUR 800 shared with [[lkcl]]
 131  - <https://bugs.libre-soc.org/show_bug.cgi?id=703> SVP64 preliminary decode
 132    - EUR 800
 133  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
 134  - <https://bugs.libre-soc.org/show_bug.cgi?id=425> div errors
 135  - <https://bugs.libre-soc.org/show_bug.cgi?id=432> mul overflow incorrect
 136  - <https://bugs.libre-soc.org/show_bug.cgi?id=578> SVP64 generator
 137    - EUR 500
 138  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
 139  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
 140  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
 141  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
 142  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
 143
 144
 145  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 146    - EUR 150
 147    - donated
 148  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 149    - EUR 200
 150    - donated
 151  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 152    - EUR 150
 153    - donated
 154  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 155    - EUR 200
 156    - donated
 157  - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
 158    - EUR 700
 159    - (lip6.fr donated)
 160  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 161    - (total EUR 400 25% donated by LIP6)
 162    - EUR 100 lkcl
 163  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
 164    - EUR 900
 165    - shared with [[lxo]]
 166  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
 167    - EUR 1100
 168    - shared with lauri, jacob
 169  - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
 170    - EUR 1250
 171    - Shared 50% with Staf
 172  - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
 173    - EUR 300
 174    - Shared with Staf, cole
 175  - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
 176    - EUR 450
 177    - Shared with Staf
 178  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
 179  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
 180    - Project 2019-10-043 06dec2020 wishbone
 181    - EUR (TBD)
 182
 183 ### Project 2019-10-029 14mar2020 coriolis2
 184
 185  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
 186    - (total EUR 100 shared 50% with staf)
 187    - EUR 50 lkcl
 188  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
 189    - (total EUR 1500 shared 50% with LIP6)
 190    - EUR 750 lkcl
 191  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 192    - (total EUR 400 shared 75% with LIP6)
 193    - EUR 300 lkcl
 194
 195 ### Project 2019-02-012 06dec2020 Core
 196
 197  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
 198    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
 199  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 200    - EUR 750 donated
 201  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 202    - EUR 1500
 203
 204 ### Project 2019-10-043 06dec2020 wishbone
 205
 206  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 207    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 208  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 209    - EUR 200
 210  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 211    - EUR 100
 212  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 213    - EUR 200
 214  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 215    - EUR 100
 216  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 217    - EUR 200
 218  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 219    - EUR 450
 220  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 221    - EUR 100
 222  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 223    - EUR 200 donated
 224  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 225    - EUR 250 (share with cole)
 226
 227 ### Project 2019-10-032 06dec2020 proofs
 228
 229  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 230    - parent #195
 231    - EUR 400 donated
 232  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 233    - parent #195
 234    - EUR 300 donated
 235  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 236    - EUR 400 donated
 237    - parent #195
 238  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 239    - EUR 400 donated
 240    - parent #195
 241
 242 ## Submitted for NLNet RFP
 243
 244 submitted 2021-dec-09 but not confirmed paid
 245
 246  - <https://bugs.libre-soc.org/show_bug.cgi?id=709> better Partitioned eq (Assign)
 247    - EUR 300
 248  - <https://bugs.libre-soc.org/show_bug.cgi?id=707> Partitioned Cat
 249    - EUR 250
 250  - <https://bugs.libre-soc.org/show_bug.cgi?id=200> IEEE754 FP layout
 251  - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[veera]]
 252  - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
 253    - EUR 800 shared between:
 254    - EUR 500 [[lkcl]]
 255    - EUR 300 [[tplaten]]
 256  - <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
 257    - EUR 5500 shared between:
 258    - EUR 3850 lkcl
 259    - EUR 1650 Others
 260  - <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
 261    - EUR 1600
 262  - <https://bugs.libre-soc.org/show_bug.cgi?id=702> Matrix REMAP tests
 263    - EUR 600
 264  - <https://bugs.libre-soc.org/show_bug.cgi?id=712> ISACaller supporting XLEN
 265    - EUR 500 shared between:
 266    - EUR 100 [[lkcl]]
 267    - EUR 325 dmitry
 268    - EUR 75 maciej
 269  - <https://bugs.libre-soc.org/show_bug.cgi?id=730> adapt ALU test cases
 270
 271
 272 ### Project 2019-02-012 04sep2020 Core
 273
 274  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 275    - EUR 2000 total, shared with florent.  EUR 1200
 276
 277 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 278
 279 ## Paid
 280
 281 donation from NLNet confirmed received:
 282
 283 ### coriolis2 2021-apr-04
 284
 285  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 286    - EUR 3000
 287    - shared with Staf 50%
 288
 289 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 290
 291  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 292     - EUR 2000, python POWER9 simulator
 293     - Shared 50% with [[mnolan]], EUR 1000
 294  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 295     - EUR 250, functions needed for simulator
 296     - Shared 20% with [[mnolan]], EUR 50
 297
 298 ### proofs 2019-10-032
 299
 300  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 301    - EUR 500 shared 20% samuel, EUR 100
 302  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 303    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 304  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 305    - EUR 400 shared 25% [[mnolan]] EUR 100
 306  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 307    - EUR 150
 308
 309 ### wishbone 2019-10-043
 310
 311  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 312    - EUR 500
 313  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 314     - EUR 300
 315  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 316     - EUR 250
 317  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 318    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 319  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 320    - EUR 300
 321  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 322    - EUR 400, 50% shared [[programmerjake]] EUR 200
 323  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 324    - EUR 750, 33% shared [[programmerjake]] EUR 250
 325  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 326    - EUR 200 50% shared, cole, EUR 100
 327  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 328    - EUR 200
 329  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 330    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 331  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 332    - EUR 150
 333  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 334    - EUR 400 shared 50% [[mnolan]] EUR 200
 335  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 336    - EUR 250 shared 40% [[mnolan]] EUR 100
 337  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 338    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 339  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 340    - EUR 300 shared 50% [[mnolan]] EUR 150
 341  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 342    - EUR 750
 343  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 344   - EUR 100
 345  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 346   - EUR 100
 347  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 348    - EUR 100
 349  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 350    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 351
 352 ### Project 2019-02-012 28-apr-2020
 353
 354  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 355    - 6600 scoreboard multi-read/write
 356    - EUR 600
 357  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 358    - Partitioned equals and greater than comparison
 359    - Shared 50% with [[mnolan]]
 360    - EUR 200 (each)
 361  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 362    - partitioned scalar/vector shift
 363    - Shared 50% with [[lkcl]]
 364    - EUR 350 (each)
 365
 366 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 367
 368  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 369     - auto-parser of POWER9
 370     - Shared 50% with [[mnolan]]
 371     - EUR 500 (each)
 372
 373 ### Project 2019-10-029 Date 14mar2020
 374
 375 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 376   - EUR 1200
 377
 378 ### Project 2019-02-012 Date 12mar2020
 379
 380 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 381 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 382 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 383 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 384
 385 ### Project 2019-02-012 Date 28jan2020
 386
 387 * admin tasks
 388 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 389