Improve formatting and prepare the top-level structure of the GTKWave tutorial
[libreriscv.git] / lkcl.mdwn
1 # Luke Kenneth Casson Leighton
2
3 Lead dev and Project Coordinator for Libre-SOC.
4
5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
7
8 # Status tracking
9
10 move things along from one stage to the next
11
12 ## Currently working on
13
14 - Project Management
15 - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
16 - EUR 250
17 - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
18 - <https://bugs.libre-soc.org/show_bug.cgi?id=425>
19 - <https://bugs.libre-soc.org/show_bug.cgi?id=432>
20 - <https://bugs.libre-soc.org/show_bug.cgi?id=450>
21 - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
22 - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
23 - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
24 - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
25 - shared with cole
26 - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
27 - EUR 50, shared with samuel 10%
28 - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
29 - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
30 - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
31 - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
32 - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
33 - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
34 - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
35 - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
36 - EUR 300
37 - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
38 - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
39 - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
40 - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
41 - <https://bugs.libre-soc.org/show_bug.cgi?id=335> Branch proof
42 - EUR 400 shared 25% [[mnolan]] EUR 100
43 - <https://bugs.libre-soc.org/show_bug.cgi?id=306> ALU proof
44 - EUR 500 shared [[mnolan]] samuel, TBD split
45 - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
46 - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
47
48 ## Completed but not yet submitted:
49
50 - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
51
52 ## Submitted for NLNet RFP
53
54 submitted but not confirmed paid:
55
56 ### 2019-10P-046 19-aug-2020 NLNet 2019-10-046 Formal Standards OpenPOWER
57
58 - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
59 - EUR 2000, python POWER9 simulator
60 - Shared 50% with [[mnolan]], EUR 1000
61 - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
62 - EUR 250, functions needed for simulator
63 - Shared 20% with [[mnolan]], EUR 50
64
65 #### proofs 2019-10-032
66
67 - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
68 - EUR 500 shared 20% samuel, EUR 100
69 - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
70 - EUR 300 shared 1/6 [[mnolan]] EUR 50
71 - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
72 - EUR 400 shared 25% [[mnolan]] EUR 100
73 - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
74 - EUR 150
75
76 ### wishbone 2019-10-043
77
78 - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
79 - EUR 500
80 - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
81 - EUR 300
82 - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
83 - EUR 250
84 - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
85 - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
86 - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
87 - EUR 300
88 - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
89 - EUR 400, 50% shared [[programmerjake]] EUR 200
90 - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
91 - EUR 750, 33% shared [[programmerjake]] EUR 250
92 - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
93 - EUR 200 50% shared, cole, EUR 100
94 - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
95 - EUR 200
96 - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
97 - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
98 - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
99 - EUR 150
100 - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
101 - EUR 400 shared 50% [[mnolan]] EUR 200
102 - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
103 - EUR 250 shared 40% [[mnolan]] EUR 100
104 - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
105 - EUR 300 shared 1/3 [[mnolan]] EUR 100
106 - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
107 - EUR 300 shared 50% [[mnolan]] EUR 150
108 - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
109 - EUR 750
110 - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
111 - EUR 100
112 - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
113 - EUR 100
114 - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
115 - EUR 100
116 - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
117 - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
118
119
120 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
121
122 ## Paid
123
124 donation from NLNet confirmed received:
125
126 ### Project 2019-02-012 28-apr-2020
127
128 - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
129 - 6600 scoreboard multi-read/write
130 - EUR 600
131 - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
132 - Partitioned equals and greater than comparison
133 - Shared 50% with [[mnolan]]
134 - EUR 200 (each)
135 - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
136 - partitioned scalar/vector shift
137 - Shared 50% with [[lkcl]]
138 - EUR 350 (each)
139
140 ### 2019-10P-046 28-apr-2020 NLNet 2019 Formal Standards OpenPOWER
141
142 - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
143 - auto-parser of POWER9
144 - Shared 50% with [[mnolan]]
145 - EUR 500 (each)
146
147 ### Project 2019-10-029 Date 14mar2020
148
149 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial EUR 1200
150
151 ### Project 2019-02-012 Date 12mar2020
152
153 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
154 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
155 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
156 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
157
158 ### Project 2019-02-012 Date 28jan2020
159
160 * admin tasks
161 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
162