lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
   8 * <http://twitter.com/lkcl>
   9
  10 # Status tracking
  11
  12 move things along from one stage to the next
  13
  14 ## Currently working on
  15
  16  - Project Management
  17  - <https://bugs.libre-soc.org/show_bug.cgi?id=712> ISACaller supporting XLEN
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[veera]]
  19  - <https://bugs.libre-soc.org/show_bug.cgi?id=701> DCT FFT documentation
  20  - <https://bugs.libre-soc.org/show_bug.cgi?id=658> SVSTATE extended to 64 bit
  21  - <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
  22  - <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
  23  - <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
  24  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  25  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  26  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  29  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  30    - EUR
  31  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  32  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=450> Create HDL MMU
  34  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
  35  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  36  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  38  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  39    - shared with cole
  40  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  41    - EUR 50, shared with samuel 10%
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  43  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
  44  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  45  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  46    - EUR 50, shared with samuel (EUR 350)
  47  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  48  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  49  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  50  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  51  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  52    - EUR 200
  53  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  54  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  55    - donated
  56    - parent #198
  57    - EUR 200
  58  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  59   - MultiCompUnit (and Function Units) proof
  60  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
  61   - donated
  62   - parent #195
  63  - <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
  64
  65 ## Completed but not yet submitted:
  66  - <https://bugs.libre-soc.org/show_bug.cgi?id=703> SVP64 preliminary decode
  67    - EUR 800
  68  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
  69  - <https://bugs.libre-soc.org/show_bug.cgi?id=425> div errors
  70  - <https://bugs.libre-soc.org/show_bug.cgi?id=432> mul overflow incorrect
  71  - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
  72    - EUR 800 shared between:
  73    - EUR 500 [[lkcl]]
  74    - EUR 300 [[tplaten]]
  75  - <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
  76    - EUR 5500 shared between:
  77    - EUR 3850 lkcl
  78    - EUR 1650 Others
  79  - <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
  80    - EUR 1600
  81  - <https://bugs.libre-soc.org/show_bug.cgi?id=702> Matrix REMAP tests
  82    - EUR 600
  83  - <https://bugs.libre-soc.org/show_bug.cgi?id=578> SVP64 generator
  84    - EUR 500
  85  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
  86  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
  87  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
  88  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
  89  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
  90
  91
  92  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
  93    - EUR 150
  94    - donated
  95  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
  96    - EUR 200
  97    - donated
  98  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
  99    - EUR 150
 100    - donated
 101  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 102    - EUR 200
 103    - donated
 104  - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
 105    - EUR 700
 106    - (lip6.fr donated)
 107  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 108    - (total EUR 400 25% donated by LIP6)
 109    - EUR 100 lkcl
 110  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
 111    - EUR 900
 112    - shared with [[lxo]]
 113  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
 114    - EUR 1100
 115    - shared with lauri, jacob
 116  - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
 117    - EUR 1250
 118    - Shared 50% with Staf
 119  - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
 120    - EUR 300
 121    - Shared with Staf, cole
 122  - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
 123    - EUR 450
 124    - Shared with Staf
 125  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
 126  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 127    - EUR 3000
 128    - shared with Staf 50%
 129  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
 130    - Project 2019-10-043 06dec2020 wishbone
 131    - EUR (TBD)
 132
 133 ### Project 2019-10-029 14mar2020 coriolis2
 134
 135  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
 136    - (total EUR 100 shared 50% with staf)
 137    - EUR 50 lkcl
 138  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
 139    - (total EUR 1500 shared 50% with LIP6)
 140    - EUR 750 lkcl
 141  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 142    - (total EUR 400 shared 75% with LIP6)
 143    - EUR 300 lkcl
 144
 145 ### Project 2019-02-012 06dec2020 Core
 146
 147  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
 148    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
 149  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 150    - EUR 750 donated
 151  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 152    - EUR 1500
 153
 154 ### Project 2019-10-043 06dec2020 wishbone
 155
 156  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 157    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 158  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 159    - EUR 200
 160  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 161    - EUR 100
 162  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 163    - EUR 200
 164  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 165    - EUR 100
 166  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 167    - EUR 200
 168  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 169    - EUR 450
 170  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 171    - EUR 100
 172  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 173    - EUR 200 donated
 174  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 175    - EUR 250 (share with cole)
 176
 177 ### Project 2019-10-032 06dec2020 proofs
 178
 179  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 180    - parent #195
 181    - EUR 400 donated
 182  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 183    - parent #195
 184    - EUR 300 donated
 185  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 186    - EUR 400 donated
 187    - parent #195
 188  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 189    - EUR 400 donated
 190    - parent #195
 191
 192 ## Submitted for NLNet RFP
 193
 194 submitted but not confirmed paid:
 195
 196  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 197
 198 ### Project 2019-02-012 04sep2020 Core
 199
 200  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 201    - EUR 2000 total, shared with florent.  EUR 1200
 202
 203 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 204
 205 ## Paid
 206
 207 donation from NLNet confirmed received:
 208
 209 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 210
 211  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 212     - EUR 2000, python POWER9 simulator
 213     - Shared 50% with [[mnolan]], EUR 1000
 214  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 215     - EUR 250, functions needed for simulator
 216     - Shared 20% with [[mnolan]], EUR 50
 217
 218 ### proofs 2019-10-032
 219
 220  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 221    - EUR 500 shared 20% samuel, EUR 100
 222  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 223    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 224  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 225    - EUR 400 shared 25% [[mnolan]] EUR 100
 226  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 227    - EUR 150
 228
 229 ### wishbone 2019-10-043
 230
 231  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 232    - EUR 500
 233  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 234     - EUR 300
 235  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 236     - EUR 250
 237  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 238    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 239  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 240    - EUR 300
 241  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 242    - EUR 400, 50% shared [[programmerjake]] EUR 200
 243  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 244    - EUR 750, 33% shared [[programmerjake]] EUR 250
 245  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 246    - EUR 200 50% shared, cole, EUR 100
 247  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 248    - EUR 200
 249  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 250    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 251  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 252    - EUR 150
 253  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 254    - EUR 400 shared 50% [[mnolan]] EUR 200
 255  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 256    - EUR 250 shared 40% [[mnolan]] EUR 100
 257  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 258    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 259  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 260    - EUR 300 shared 50% [[mnolan]] EUR 150
 261  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 262    - EUR 750
 263  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 264   - EUR 100
 265  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 266   - EUR 100
 267  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 268    - EUR 100
 269  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 270    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 271
 272 ### Project 2019-02-012 28-apr-2020
 273
 274  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 275    - 6600 scoreboard multi-read/write
 276    - EUR 600
 277  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 278    - Partitioned equals and greater than comparison
 279    - Shared 50% with [[mnolan]]
 280    - EUR 200 (each)
 281  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 282    - partitioned scalar/vector shift
 283    - Shared 50% with [[lkcl]]
 284    - EUR 350 (each)
 285
 286 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 287
 288  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 289     - auto-parser of POWER9
 290     - Shared 50% with [[mnolan]]
 291     - EUR 500 (each)
 292
 293 ### Project 2019-10-029 Date 14mar2020
 294
 295 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 296   - EUR 1200
 297
 298 ### Project 2019-02-012 Date 12mar2020
 299
 300 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 301 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 302 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 303 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 304
 305 ### Project 2019-02-012 Date 28jan2020
 306
 307 * admin tasks
 308 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 309