lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7
   8 # Status tracking
   9
  10 move things along from one stage to the next
  11
  12 ## Currently working on
  13
  14  - Project Management
  15  - <https://bugs.libre-soc.org/show_bug.cgi?id=425>
  16  - <https://bugs.libre-soc.org/show_bug.cgi?id=432>
  17  - <https://bugs.libre-soc.org/show_bug.cgi?id=450>
  18  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  19  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  20  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  21  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  22    - shared with cole
  23  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  24    - EUR 50, shared with samuel 10%
  25  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  26  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  29    - EUR 50, shared with samuel (EUR 350)
  30  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  31  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  32  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  34  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> Branch proof
  35    - EUR 400 shared 25% [[mnolan]] EUR 100
  36  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> ALU proof
  37    - EUR 500 shared [[mnolan]] samuel, TBD split
  38  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
  39  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> LD/ST cache-inhibit
  40    - EUR 200
  41  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
  42    - EUR 250 (share with cole)
  43  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
  44  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
  45  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
  46  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
  47
  48 ## Completed but not yet submitted:
  49
  50  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
  51    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
  52  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
  53    - EUR 200
  54  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> LD/ST sign-extend
  55    - EUR 100
  56  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
  57    - EUR 200
  58  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
  59    - EUR 100
  60  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
  61    - EUR 200
  62  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
  63    - EUR 450
  64  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
  65    - EUR 100
  66
  67 donated:
  68
  69  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
  70      - with [[lkcl]]
  71  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
  72  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
  73      - functions needed for simulator
  74      - Shared 90% with [[lkcl]]
  75  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> parent #198
  76      - Formal proof of decoder
  77      - EUR 200
  78  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> parent #195
  79      - POWER9 ALU proof
  80  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> parent #195
  81      - POWER9 CR proof
  82  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> parent #195
  83      - POWER9 BRANCH proof
  84  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> parent #195
  85      - POWER9 LOGICAL proof
  86  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> parent #195
  87     - POWER9 ROTATE proof
  88  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  89     - MultiCompUnit (and Function Units) proof
  90
  91 ## Submitted for NLNet RFP
  92
  93 submitted but not confirmed paid:
  94
  95 ### Project 2019-02-012 04sep2020 Core
  96
  97  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
  98    - EUR 2000 total, shared with florent.  EUR 1200
  99
 100 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 101
 102 ## Paid
 103
 104 donation from NLNet confirmed received:
 105
 106 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 107
 108  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 109     - EUR 2000, python POWER9 simulator
 110     - Shared 50% with [[mnolan]], EUR 1000
 111  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 112     - EUR 250, functions needed for simulator
 113     - Shared 20% with [[mnolan]], EUR 50
 114
 115 #### proofs 2019-10-032
 116
 117  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 118    - EUR 500 shared 20% samuel, EUR 100
 119  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 120    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 121  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 122    - EUR 400 shared 25% [[mnolan]] EUR 100
 123  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 124    - EUR 150
 125
 126 ### wishbone 2019-10-043
 127
 128  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 129    - EUR 500
 130  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 131     - EUR 300
 132  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 133     - EUR 250
 134  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 135    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 136  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 137    - EUR 300
 138  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 139    - EUR 400, 50% shared [[programmerjake]] EUR 200
 140  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 141    - EUR 750, 33% shared [[programmerjake]] EUR 250
 142  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 143    - EUR 200 50% shared, cole, EUR 100
 144  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 145    - EUR 200
 146  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 147    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 148  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 149    - EUR 150
 150  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 151    - EUR 400 shared 50% [[mnolan]] EUR 200
 152  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 153    - EUR 250 shared 40% [[mnolan]] EUR 100
 154  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 155    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 156  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 157    - EUR 300 shared 50% [[mnolan]] EUR 150
 158  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 159    - EUR 750
 160  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 161   - EUR 100
 162  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 163   - EUR 100
 164  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 165    - EUR 100
 166  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 167    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 168
 169 ### Project 2019-02-012 28-apr-2020
 170
 171  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 172    - 6600 scoreboard multi-read/write
 173    - EUR 600
 174  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 175    - Partitioned equals and greater than comparison
 176    - Shared 50% with [[mnolan]]
 177    - EUR 200 (each)
 178  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 179    - partitioned scalar/vector shift
 180    - Shared 50% with [[lkcl]]
 181    - EUR 350 (each)
 182
 183 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 184
 185  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 186     - auto-parser of POWER9
 187     - Shared 50% with [[mnolan]]
 188     - EUR 500 (each)
 189
 190 ### Project 2019-10-029 Date 14mar2020
 191
 192 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial EUR 1200
 193
 194 ### Project 2019-02-012 Date 12mar2020
 195
 196 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 197 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 198 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 199 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 200
 201 ### Project 2019-02-012 Date 28jan2020
 202
 203 * admin tasks
 204 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 205